div/
div/div.cr.mti
div/div.mpf
div/div5.v
div/testb.v
div/vsim.wlf
div/work/
div/work/@_opt/
div/work/@_opt/_deps
div/work/@_opt/vopt0k1wbg
div/work/@_opt/vopt44qsbg
div/work/@_opt/vopt84hnve
div/work/@_opt/voptbj0gcg
div/work/@_opt/voptbk6ive
div/work/@_opt/vopte3ndcg
div/work/@_opt/voptf4wfve
div/work/@_opt/voptijb9cg
div/work/@_opt/voptikhcve
div/work/@_opt/vopts3v3we
div/work/@_opt/voptx3czbg
div/work/_info
div/work/_temp/
div/work/_vmake
div/work/div5/
div/work/div5/_primary.dat
div/work/div5/_primary.dbs
div/work/div5/_primary.vhd
div/work/div5/verilog.asm
div/work/div5/verilog.rw
div/work/testb/
div/work/testb/_primary.dat
div/work/testb/_primary.dbs
div/work/testb/_primary.vhd
div/work/testb/verilog.asm
div/work/testb/verilog.rw