资源列表
rej03c0325_r1ex24512axxs0ads
- R1EX24xxx series are two-wire serial interface EEPROM (Electrically Erasable and Programmable ROM). They realize high speed, low power consumption and a high level of reliability by employing advanced MNOS memory technology and CMOS process and l
doc1116
- The AT24C512 provides 524,288 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 65,536 words of 8 bits each. The device鈥檚 cascadable feature allows up to four devices to share a common two-wire bus. The
report
- 网上购物车原型的实现的开题报告说明文档-Online Shopping Cart prototype implementation of the report title to open document
MATLAB
- 数字水印算法中常用的 MATLAB 函数，应用MATLAB语言实现了一个空间域数字水印算法的嵌入、提取和攻击过程，并给出了程序运行的结果。-Digital watermarking algorithm used in the MATLAB function, the application of MATLAB language implementation of a spatial domain digital watermarking algorithm for embedding, extr
C
- 学习C的很好的一些例子和源码，希望对大家有所帮助-Study C, a number of good examples and source code, and they hope to help everyone
AdvancedOfficePasswordRecovery
- Advanced Office Password Recovery 4.11 绿色注册版
Exceptional.Cpp
- Exceptional C++ shows by example how to go about sound software engineering in standard C++. Do you enjoy solving thorny C++ problems and puzzles? Do you relish writing robust and extensible code? Then take a few minutes and challenge yourself with s
More.Exceptional.Cpp
- Organized in a practical problem-and-solution format, More Exceptional C++ picks up where the widely acclaimed Exceptional C++ leaves off, providing successful strategies for solving real-world problems in C++. Drawing from years of in-the-trenches e
1
- 应用软件专业设计撰写规范 应用软件专业设计撰写规范-Application software design specification writing software applications designed to write professional norms
prasa2003
- Using colour features for video-based tracking of people in a multi-camera environment.-Using colour features for video-based tracking of people in a multi-camera environment.
Vincular+servidores
- SQL Server, Linking Servers Spanish Tutorial
clk4
- clk4 时钟分频设计用于FPGA入门设计-clk4 clock divider is designed for FPGA design entry