资源列表
VHDL1
- 移位寄存器和9人表决器电路的VHDL设计方案-Shift register people to vote and 9 of VHDL circuit design
jfq
- 加法器是实现两个二进制数相加运算的 基本单元电路。8 位加法器就是实现两个8 位 二进制相加,同时加上低位进位的运算电路。-Adder is to achieve the sum of two binary computing the basic unit of the circuit. 8-bit adder is to realize the sum of two 8-bit binary, at the same time together with the low binary
zishj
- 设计一个自动售货机控制程序，它的投币口每次可以投入1元、2元、5元，且规定投入1元或2元后不得再投入5元。当投入总值等于或超过设定值（4元），售货机就自动送出货物并找回多余的钱。-Design a vending machine control program, which each time slot to be injected into the 1 yuan, 2 yuan, 5 yuan, and provides input 1 yuan or 2 yuan may not re-en
sw_project
- 很好的软件工程的书籍，并附有大量的代码说明，清晰明了。-Good software engineering books, together with a lot of code that clarity.
200761654489877
- 软件书，介绍mfc的内容和使用，可以帮助初学者学习MFC。-Software book on mfc content and use, can help beginners to learn MFC.
M62429asm
- M62429的驱动ASM程序,用51系列单片机的汇编语言编写。-M62429 driver ASM procedure, with 51 Series MCU assembly language preparation.
1
- 945集成显卡的效果测试 其它显卡不要下，只适合intel945的板载显卡-The effect of 945 integrated graphics cards do not have other tests are only suitable for the onboard graphics intel945
fre_ctrl
- 利用verilog语言，从上至下层次管理的设计思想；Verilog HDL的行为描述和结构描述,实现8位频率计，4个0检测修正电路的原理说明-The use of Verilog language, top-down hierarchical management design idea Verilog HDL descr iption of the behavior and structure of a descr iption of the realization of frequency
MATLAB_2
- MATLAB矩阵及其运算课件 变量和数据操作 结构数据和单元数据-MATLAB matrix and computing courseware structure of variables and data manipulation of data and unit data
rjgc
- 图书管理系统软件工程文档, 1需求分析说明 2、概要设计说明 3、详细设计说明 4、代码，并对相关代码内容进行注释。 5、测试报告 6、使用说明 -Library management system software engineering documents, a demand analysis in note 2, Note 3 Summary of design, detailed design note 4, code, and code the conten
M8HVPRO
- avr atmega8芯片中文资料 典型应用于led显示屏系统-avr atmega8 chips led Chinese information display systems used in typical