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  1. PCA

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  2. This file contains some information about PCA in Pattern Recognition. One of the Problems of high dimensional data is , “the curse of dimensionality”. Using PCA we can reduce dimensions.
  3. 所属分类:Development Research

    • 发布日期:2017-03-27
    • 文件大小:430.5kb
    • 提供者:ekhorasan
  1. CNUSIRLINUXC.tar

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  2. it is to find mean meadin etc
  3. 所属分类:Development Research

    • 发布日期:2017-03-28
    • 文件大小:1.48kb
    • 提供者:ramesh babu b
  1. Wireless-Sensor-Networks-1

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  2. With the recent advances inmicro electro-mechanical systems(MEMS) technology, wireless communications, and digital electronics, the design and development of low-cost, low-power, multifunctional sensor nodes that are small in size and communicate unt
  3. 所属分类:Development Research

    • 发布日期:2017-05-16
    • 文件大小:4.3mb
    • 提供者:Loan
  1. TriStateTreeView

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  2. This program is by Written by C#,it will be useful for Application on Windows Forms - This program is by Written by C#,it will be useful for Application on Windows Forms
  3. 所属分类:Development Research

    • 发布日期:2017-03-26
    • 文件大小:118.02kb
    • 提供者:Khanh
  1. Combobox_In-DataGridView

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  2. Program written by C#, Purpose of Developing Application on flatform windows Forms
  3. 所属分类:Development Research

    • 发布日期:2017-03-29
    • 文件大小:85.16kb
    • 提供者:Khanh
  1. aes_pipe_latest.tar

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  2. VERILOG IMPLEMENTATION OF PIPELINED AES ALGORITHM
  3. 所属分类:Development Research

    • 发布日期:2017-04-24
    • 文件大小:181.74kb
    • 提供者:ANNIYAN
  1. galois_lfsr_latest.tar

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  2. GALOIS FIELD POLYNOMIAL BASED LFSR
  3. 所属分类:Development Research

    • 发布日期:2017-04-14
    • 文件大小:3.94kb
    • 提供者:ANNIYAN
  1. pwm_latest.tar

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  2. VERILOG IMPLEMENTATION OF PWM
  3. 所属分类:Development Research

    • 发布日期:2017-04-25
    • 文件大小:124.86kb
    • 提供者:ANNIYAN
  1. fht_latest.tar

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  2. FAST HADAMARD TRANSFORM VERILOG FOR IMAGE PROCESSING
  3. 所属分类:Development Research

    • 发布日期:2017-04-10
    • 文件大小:1.02kb
    • 提供者:ANNIYAN
  1. 1-s2.0-S0026269208002085-main

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  2. Formal verification of analog and mixed signal designs A survey
  3. 所属分类:Development Research

    • 发布日期:2017-04-24
    • 文件大小:210.12kb
    • 提供者:ANNIYAN
  1. 1-s2.0-S0141933104000419-main

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  2. A Simulink-based hybrid codesign tool for rapid prototyping of FPGA’s in signal processing systems
  3. 所属分类:Development Research

    • 发布日期:2017-05-03
    • 文件大小:556.95kb
    • 提供者:ANNIYAN
  1. 05537928

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  2. An All-Digital PLL with a First Order N Shaping Time-to-Digital Converter
  3. 所属分类:Development Research

    • 发布日期:2017-04-16
    • 文件大小:380.5kb
    • 提供者:ANNIYAN
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