资源列表
vs2010learn
- 最全VS2010初级教程学习手册Complete VS2010 junior tutorial to learn manual-Complete VS2010 junior tutorial to learn manual
13BEC0590_L41P42_MICROWAVE-LAB
- task report for power dividers
线性卷积编码的线形移位寄存器poly2trellis的解释
- 线性的卷积编码，基本的信道编码，可以由线性移位寄存器（即线性多项式）构成。 输出网格trellis表示由移位寄存器组成的网格装的卷积编码器，通过移位寄存器多项式生成，所以在Matlab中的函数叫做poly2trellis，也就是多项式poly-to-网格trellis，用来描述寄存器的结构方式。生成的trellis可以作为线形卷积编码函数convenc和或者其解码（如Viterbi解码函数vitdec）的输入。
VSIPL1.5
- VSIPL1.5的标准规范文档，有接口的详细介绍,供参考使用。-VSIPL1.5 standard specification, including interface details.
07339720
- PAPR Constrained Power Allocation for Multicarrier Transmission in Multiuser SIMO Communications
07342973
- Wireless Energy Harvesting in a Cognitive Relay Network
07349246
- A Robust Opportunistic Relaying Strategy for Co-Operative Wireless Communications
07360240
- Enabling Green Wireless Networking With Device-to-Device Links: A Joint Optimization Approach
07381695
- Maximizing the Sum Rate in Cellular Networks Using Multiconvex Optimization
action-recognition
- 这是几篇有关基于密集轨迹的动作识别的文章，很经典，很有用！文中有对应链接，可以下载到对应代码。-This is a few articles on the action based on dense trajectory recognition, very classic, very useful! The text has a corresponding link, you can download to the corresponding code.
laplaceRES
- Résumé du cours sur la transformation de LAPLACE -transformation de LAPLACE
Cy7C68013_SLAVE-FIFO_Verilog
- 针对CY7C68013在SLAVE FIFO 模式下读写Verilog源代码-For CY7C68013 in the SLAVE FIFO mode to read and write Verilog source code