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文件名称:fpga_ctl

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [MacOS]
  • 上传时间：
    2013-03-14
  • 文件大小：
    5.71mb
  • 已下载：
    0次
  • 提 供 者：
    shiw*****
  • 相关连接：
    无
  • 下载说明：
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niosII和VHDL的联合应用，VHDL编写基本框架，C++编写niosII应用程序-joint application niosII and VHDL, VHDL prepared a basic framework, C++ to write niosII application
(系统自动生成,下载前可以参看下载内容)

下载文件列表

fpga_ctl/.sopc_builder/filters.xml
fpga_ctl/.sopc_builder/install.ptf
fpga_ctl/.sopc_builder/install2.ptf
fpga_ctl/.sopc_builder/preferences.xml
fpga_ctl/AD_BUSY.vhd
fpga_ctl/AD_CHANNAL.vhd
fpga_ctl/AD_CLK.vhd
fpga_ctl/AD_CS.vhd
fpga_ctl/AD_DATA.vhd
fpga_ctl/AD_RC.vhd
fpga_ctl/AD_SYNC.vhd
fpga_ctl/altpll0.bsf
fpga_ctl/altpll0.cmp
fpga_ctl/altpll0.ppf
fpga_ctl/altpll0.qip
fpga_ctl/altpll0.vhd
fpga_ctl/Chain1.cdf
fpga_ctl/cpu_0.sdc
fpga_ctl/cpu_0.vhd
fpga_ctl/cpu_0_jtag_debug_module_sysclk.vhd
fpga_ctl/cpu_0_jtag_debug_module_tck.vhd
fpga_ctl/cpu_0_jtag_debug_module_wrapper.vhd
fpga_ctl/cpu_0_ociram_default_contents.mif
fpga_ctl/cpu_0_oci_test_bench.vhd
fpga_ctl/cpu_0_rf_ram.mif
fpga_ctl/cpu_0_test_bench.vhd
fpga_ctl/db/altsyncram_0c21.tdf
fpga_ctl/db/altsyncram_fd22.tdf
fpga_ctl/db/altsyncram_qt62.tdf
fpga_ctl/db/altsyncram_stv1.tdf
fpga_ctl/db/altsyncram_trb1.tdf
fpga_ctl/db/fpga_ctl.(0).cnf.cdb
fpga_ctl/db/fpga_ctl.(0).cnf.hdb
fpga_ctl/db/fpga_ctl.(1).cnf.cdb
fpga_ctl/db/fpga_ctl.(1).cnf.hdb
fpga_ctl/db/fpga_ctl.(10).cnf.cdb
fpga_ctl/db/fpga_ctl.(10).cnf.hdb
fpga_ctl/db/fpga_ctl.(11).cnf.cdb
fpga_ctl/db/fpga_ctl.(11).cnf.hdb
fpga_ctl/db/fpga_ctl.(12).cnf.cdb
fpga_ctl/db/fpga_ctl.(12).cnf.hdb
fpga_ctl/db/fpga_ctl.(13).cnf.cdb
fpga_ctl/db/fpga_ctl.(13).cnf.hdb
fpga_ctl/db/fpga_ctl.(14).cnf.cdb
fpga_ctl/db/fpga_ctl.(14).cnf.hdb
fpga_ctl/db/fpga_ctl.(15).cnf.cdb
fpga_ctl/db/fpga_ctl.(15).cnf.hdb
fpga_ctl/db/fpga_ctl.(16).cnf.cdb
fpga_ctl/db/fpga_ctl.(16).cnf.hdb
fpga_ctl/db/fpga_ctl.(17).cnf.cdb
fpga_ctl/db/fpga_ctl.(17).cnf.hdb
fpga_ctl/db/fpga_ctl.(18).cnf.cdb
fpga_ctl/db/fpga_ctl.(18).cnf.hdb
fpga_ctl/db/fpga_ctl.(19).cnf.cdb
fpga_ctl/db/fpga_ctl.(19).cnf.hdb
fpga_ctl/db/fpga_ctl.(2).cnf.cdb
fpga_ctl/db/fpga_ctl.(2).cnf.hdb
fpga_ctl/db/fpga_ctl.(20).cnf.cdb
fpga_ctl/db/fpga_ctl.(20).cnf.hdb
fpga_ctl/db/fpga_ctl.(21).cnf.cdb
fpga_ctl/db/fpga_ctl.(21).cnf.hdb
fpga_ctl/db/fpga_ctl.(22).cnf.cdb
fpga_ctl/db/fpga_ctl.(22).cnf.hdb
fpga_ctl/db/fpga_ctl.(23).cnf.cdb
fpga_ctl/db/fpga_ctl.(23).cnf.hdb
fpga_ctl/db/fpga_ctl.(24).cnf.cdb
fpga_ctl/db/fpga_ctl.(24).cnf.hdb
fpga_ctl/db/fpga_ctl.(25).cnf.cdb
fpga_ctl/db/fpga_ctl.(25).cnf.hdb
fpga_ctl/db/fpga_ctl.(26).cnf.cdb
fpga_ctl/db/fpga_ctl.(26).cnf.hdb
fpga_ctl/db/fpga_ctl.(27).cnf.cdb
fpga_ctl/db/fpga_ctl.(27).cnf.hdb
fpga_ctl/db/fpga_ctl.(28).cnf.cdb
fpga_ctl/db/fpga_ctl.(28).cnf.hdb
fpga_ctl/db/fpga_ctl.(29).cnf.cdb
fpga_ctl/db/fpga_ctl.(29).cnf.hdb
fpga_ctl/db/fpga_ctl.(3).cnf.cdb
fpga_ctl/db/fpga_ctl.(3).cnf.hdb
fpga_ctl/db/fpga_ctl.(30).cnf.cdb
fpga_ctl/db/fpga_ctl.(30).cnf.hdb
fpga_ctl/db/fpga_ctl.(31).cnf.cdb
fpga_ctl/db/fpga_ctl.(31).cnf.hdb
fpga_ctl/db/fpga_ctl.(32).cnf.cdb
fpga_ctl/db/fpga_ctl.(32).cnf.hdb
fpga_ctl/db/fpga_ctl.(33).cnf.cdb
fpga_ctl/db/fpga_ctl.(33).cnf.hdb
fpga_ctl/db/fpga_ctl.(34).cnf.cdb
fpga_ctl/db/fpga_ctl.(34).cnf.hdb
fpga_ctl/db/fpga_ctl.(35).cnf.cdb
fpga_ctl/db/fpga_ctl.(35).cnf.hdb
fpga_ctl/db/fpga_ctl.(36).cnf.cdb
fpga_ctl/db/fpga_ctl.(36).cnf.hdb
fpga_ctl/db/fpga_ctl.(37).cnf.cdb
fpga_ctl/db/fpga_ctl.(37).cnf.hdb
fpga_ctl/db/fpga_ctl.(38).cnf.cdb
fpga_ctl/db/fpga_ctl.(38).cnf.hdb
fpga_ctl/db/fpga_ctl.(39).cnf.cdb
fpga_ctl/db/fpga_ctl.(39).cnf.hdb
fpga_ctl/db/fpga_ctl.(4).cnf.cdb
fpga_ctl/db/fpga_ctl.(4).cnf.hdb
fpga_ctl/db/fpga_ctl.(40).cnf.cdb
fpga_ctl/db/fpga_ctl.(40).cnf.hdb
fpga_ctl/db/fpga_ctl.(41).cnf.cdb
fpga_ctl/db/fpga_ctl.(41).cnf.hdb
fpga_ctl/db/fpga_ctl.(42).cnf.cdb
fpga_ctl/db/fpga_ctl.(42).cnf.hdb
fpga_ctl/db/fpga_ctl.(43).cnf.cdb
fpga_ctl/db/fpga_ctl.(43).cnf.hdb
fpga_ctl/db/fpga_ctl.(44).cnf.cdb
fpga_ctl/db/fpga_ctl.(44).cnf.hdb
fpga_ctl/db/fpga_ctl.(45).cnf.cdb
fpga_ctl/db/fpga_ctl.(45).cnf.hdb
fpga_ctl/db/fpga_ctl.(46).cnf.cdb
fpga_ctl/db/fpga_ctl.(46).cnf.hdb
fpga_ctl/db/fpga_ctl.(47).cnf.cdb
fpga_ctl/db/fpga_ctl.(47).cnf.hdb
fpga_ctl/db/fpga_ctl.(48).cnf.cdb
fpga_ctl/db/fpga_ctl.(48).cnf.hdb
fpga_ctl/db/fpga_ctl.(49).cnf.cdb
fpga_ctl/db/fpga_ctl.(49).cnf.hdb
fpga_ctl/db/fpga_ctl.(5).cnf.cdb
fpga_ctl/db/fpga_ctl.(5).cnf.hdb
fpga_ctl/db/fpga_ctl.(50).cnf.cdb
fpga_ctl/db/fpga_ctl.(50).cnf.hdb
fpga_ctl/db/fpga_ctl.(51).cnf.cdb
fpga_ctl/db/fpga_ctl.(51).cnf.hdb
fpga_ctl/db/fpga_ctl.(52).cnf.cdb
fpga_ctl/db/fpga_ctl.(52).cnf.hdb
fpga_ctl/db/fpga_ctl.(53).cnf.cdb
fpga_ctl/db/fpga_ctl.(53).cnf.hdb
fpga_ctl/db/fpga_ctl.(54).cnf.cdb
fpga_ctl/db/fpga_ctl.(54).cnf.hdb
fpga_ctl/db/fpga_ctl.(55).cnf.cdb
fpga_ctl/db/fpga_ctl.(55).cnf.hdb
fpga_ctl/db/fpga_ctl.(56).cnf.cdb
fpga_ctl/db/fpga_ctl.(56).cnf.hdb
fpga_ctl/db/fpga_ctl.(57).cnf.cdb
fpga_ctl/db/fpga_ctl.(57).cnf.hdb
fpga_ctl/db/fpga_ctl.(58).cnf.cdb
fpga_ctl/db/fpga_ctl.(58).cnf.hdb
fpga_ctl/db/fpga_ctl.(59).cnf.cdb
fpga_ctl/db/fpga_ctl.(59).cnf.hdb
fpga_ctl/db/fpga_ctl.(6).cnf.cdb
fpga_ctl/db/fpga_ctl.(6).cnf.hdb
fpga_ctl/db/fpga_ctl.(60).cnf.cdb
fpga_ctl/db/fpga_ctl.(60).cnf.hdb
fpga_ctl/db/fpga_ctl.(61).cnf.cdb
fpga_ctl/db/fpga_ctl.(61).cnf.hdb
fpga_ctl/db/fpga_ctl.(62).cnf.cdb
fpga_ctl/db/fpga_ctl.(62).cnf.hdb
fpga_ctl/db/fpga_ctl.(63).cnf.cdb
fpga_ctl/db/fpga_ctl.(63).cnf.hdb
fpga_ctl/db/fpga_ctl.(64).cnf.cdb
fpga_ctl/db/fpga_ctl.(64).cnf.hdb
fpga_ctl/db/fpga_ctl.(65).cnf.cdb
fpga_ctl

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