verilog/
verilog/lab1/
verilog/lab2/
verilog/lab2/arwz_pace.dhp
verilog/lab2/arwz_pace.ise
verilog/lab2/arwz_pace.ise.old
verilog/lab2/arwz_pace.ise_ISE_Backup
verilog/lab2/arwz_pace_ise7_bak.zip
verilog/lab2/bbfifo_16x8.v
verilog/lab2/kcpsm3.v
verilog/lab2/kcuart_rx.v
verilog/lab2/kcuart_tx.v
verilog/lab2/Project.dhp
verilog/lab2/transcript
verilog/lab2/uart_clock.v
verilog/lab2/uart_clock_summary.html
verilog/lab2/uart_rx.v
verilog/lab2/uart_rx_summary.html
verilog/lab2/uart_tx.v
verilog/lab2/UCLOCK.V
verilog/lab2/_xmsgs/
verilog/lab2/__ISE_repository_arwz_pace.ise_.lock
verilog/lab3/
verilog/lab3/Assembler/
verilog/lab3/Assembler/assemble.bat
verilog/lab3/Assembler/CONSTANT.TXT
verilog/lab3/Assembler/KCPSM3.EXE
verilog/lab3/Assembler/LABELS.TXT
verilog/lab3/Assembler/PASS1.DAT
verilog/lab3/Assembler/PASS2.DAT
verilog/lab3/Assembler/PASS3.DAT
verilog/lab3/Assembler/PASS4.DAT
verilog/lab3/Assembler/PASS5.DAT
verilog/lab3/Assembler/PROGRAM.COE
verilog/lab3/Assembler/PROGRAM.DEC
verilog/lab3/Assembler/PROGRAM.FMT
verilog/lab3/Assembler/PROGRAM.HEX
verilog/lab3/Assembler/PROGRAM.LOG
verilog/lab3/Assembler/PROGRAM.M
verilog/lab3/Assembler/program.psm
verilog/lab3/Assembler/PROGRAM.V
verilog/lab3/Assembler/PROGRAM.VHD
verilog/lab3/Assembler/ROM_form.coe
verilog/lab3/Assembler/ROM_form.v
verilog/lab3/Assembler/ROM_form.vhd
verilog/lab3/loopback.v
verilog/lab3/testbench.v
verilog/lab3/time_const/
verilog/lab3/time_const/bbfifo_16x8.v
verilog/lab3/time_const/isim.hdlsourcefiles
verilog/lab3/time_const/isim.log
verilog/lab3/time_const/isim.tmp_save/
verilog/lab3/time_const/isim.tmp_save/_1
verilog/lab3/time_const/isimwavedata.xwv
verilog/lab3/time_const/kcpsm3.v
verilog/lab3/time_const/kcuart_rx.v
verilog/lab3/time_const/kcuart_tx.v
verilog/lab3/time_const/loopback.v
verilog/lab3/time_const/loopback_summary.html
verilog/lab3/time_const/loopback_testbench_v_tf_isim_beh.exe
verilog/lab3/time_const/my_dcm.xaw
verilog/lab3/time_const/time_const.ise
verilog/lab3/time_const/time_const.ise_8.1i_backup
verilog/lab3/time_const/time_const.ise_ISE_Backup
verilog/lab3/time_const/uart_rx.v
verilog/lab3/time_const/uart_tx.v
verilog/lab3/time_const/_xmsgs/
verilog/lab3/time_const/_xmsgs/fuse.xmsgs
verilog/lab3/time_const/__ISE_repository_time_const.ise_.lock
verilog/lab4/
verilog/lab4/Assembler/
verilog/lab4/Assembler/CONSTANT.TXT
verilog/lab4/Assembler/KCPSM3.EXE
verilog/lab4/Assembler/LABELS.TXT
verilog/lab4/Assembler/PASS1.DAT
verilog/lab4/Assembler/PASS2.DAT
verilog/lab4/Assembler/PASS3.DAT
verilog/lab4/Assembler/PASS4.DAT
verilog/lab4/Assembler/PASS5.DAT
verilog/lab4/Assembler/PROGRAM.COE
verilog/lab4/Assembler/PROGRAM.DEC
verilog/lab4/Assembler/PROGRAM.FMT
verilog/lab4/Assembler/PROGRAM.HEX
verilog/lab4/Assembler/PROGRAM.LOG
verilog/lab4/Assembler/PROGRAM.M
verilog/lab4/Assembler/program.psm
verilog/lab4/Assembler/PROGRAM.V
verilog/lab4/Assembler/PROGRAM.VHD
verilog/lab4/Assembler/ROM_form.coe
verilog/lab4/Assembler/ROM_form.v
verilog/lab4/Assembler/ROM_form.vhd
verilog/lab4/synth_lab/
verilog/lab4/synth_lab/bbfifo_16x8.v
verilog/lab4/synth_lab/kcpsm3.v
verilog/lab4/synth_lab/kcuart_rx.v
verilog/lab4/synth_lab/kcuart_tx.v
verilog/lab4/synth_lab/loopback.ucf
verilog/lab4/synth_lab/loopback.ut
verilog/lab4/synth_lab/loopback.v
verilog/lab4/synth_lab/loopback_last_par.ncd
verilog/lab4/synth_lab/loopback_prev_built.ngd
verilog/lab4/synth_lab/loopback_summary.html
verilog/lab4/synth_lab/loopback_vhdl.prj
verilog/lab4/synth_lab/my_dcm.xaw
verilog/lab4/synth_lab/PROGRAM.V
verilog/lab4/synth_lab/synth_lab.ise
verilog/lab4/synth_lab/synth_lab.ise_ISE_Backup
verilog/lab4/synth_lab/synth_lab.ntrc_log
verilog/lab4/synth_lab/uart_rx.v
verilog/lab4/synth_lab/uart_tx.v
verilog/lab4/synth_lab/_impact.cmd
verilog/lab4/synth_lab/_impact.log
verilog/lab4/synth_lab/_xmsgs/
verilog/lab5/
verilog/lab5/Assembler/
verilog/lab5/Assembler/CONSTANT.TXT
verilog/lab5/Assembler/KCPSM3.EXE
verilog/lab5/Assembler/LABELS.TXT
verilog/lab5/Assembler/PASS1.DAT
verilog/lab5/Assembler/PASS2.DAT
verilog/lab5/Assembler/PASS3.DAT
verilog/lab5/Assembler/PASS4.DAT
verilog/lab5/Assembler/PASS5.DAT
verilog/lab5/Assembler/PROGRAM.COE
verilog/lab5/Assembler/PROGRAM.DEC
verilog/lab5/Assembler/PROGRAM.FMT
verilog/lab5/Assembler/PROGRAM.HEX
verilog/lab5/Assembler/PROGRAM.LOG
verilog/lab5/Assembler/PROGRAM.M
verilog/lab5/Assembler/program.psm
verilog/lab5/Assembler/PROGRAM.V
verilog/lab5/Assembler/PROGRAM.VHD
verilog/lab5/Assembler/ROM_form.coe
verilog/lab5/Assembler/ROM_form.v
verilog/lab5/Assembler/ROM_form.vhd
verilog/lab5/coregen/
verilog/lab5/coregen/bbfifo_16x8.v
verilog/lab5/coregen/coregen.ise
verilog/lab5/coregen/coregen.ise_ISE_Backup
verilog/lab5/coregen/kcpsm3.v
verilog/lab5/coregen/kcuart_rx.v
verilog/lab5/coregen/kcuart_tx.v
verilog/lab5/coregen/loopback.ucf
verilog/lab5/coregen/loopback.v
verilog/lab5/coregen/loopback_summary.html
verilog/lab5/coregen/my_dcm.xaw
verilog/lab5/coregen/uart_rx.v
verilog/lab5/coregen/uart_tx.v
verilog/lab5/coregen/_xmsgs/
verilog/lab5/testbench.v
verilog/lab6/
verilog/lab6/Assembler/
verilog/lab6/Assembler/CONSTANT.TXT
verilog/lab6/Assembler/KCPSM