db/logic_util_heursitic.dat
db/part1.(0).cnf.cdb
db/part1.(0).cnf.hdb
db/part1.(1).cnf.cdb
db/part1.(1).cnf.hdb
db/part1.asm.qmsg
db/part1.asm.rdb
db/part1.asm_labs.ddb
db/part1.cbx.xml
db/part1.cmp.bpm
db/part1.cmp.cdb
db/part1.cmp.hdb
db/part1.cmp.idb
db/part1.cmp.kpt
db/part1.cmp.logdb
db/part1.cmp.rdb
db/part1.cmp0.ddb
db/part1.cmp1.ddb
db/part1.cmp_merge.kpt
db/part1.db_info
db/part1.eda.qmsg
db/part1.fit.qmsg
db/part1.hier_info
db/part1.hif
db/part1.ipinfo
db/part1.lpc.html
db/part1.lpc.rdb
db/part1.lpc.txt
db/part1.map.bpm
db/part1.map.cdb
db/part1.map.hdb
db/part1.map.kpt
db/part1.map.logdb
db/part1.map.qmsg
db/part1.map.rdb
db/part1.map_bb.cdb
db/part1.map_bb.hdb
db/part1.map_bb.logdb
db/part1.pplq.rdb
db/part1.pre_map.cdb
db/part1.pre_map.hdb
db/part1.qns
db/part1.root_partition.map.reg_db.cdb
db/part1.routing.rdb
db/part1.rtlv.hdb
db/part1.rtlv_sg.cdb
db/part1.rtlv_sg_swap.cdb
db/part1.sas
db/part1.sgdiff.cdb
db/part1.sgdiff.hdb
db/part1.sld_design_entry.sci
db/part1.sld_design_entry_dsc.sci
db/part1.smart_action.txt
db/part1.sta.qmsg
db/part1.sta.rdb
db/part1.sta_cmp.6_slow.tdb
db/part1.syn_hier_info
db/part1.tis_db_list.ddb
db/part1.tmw_info
db/part1.vpr.ammdb
db/prev_cmp_part1.qmsg
incremental_db/compiled_partitions/part1.db_info
incremental_db/compiled_partitions/part1.root_partition.cmp.ammdb
incremental_db/compiled_partitions/part1.root_partition.cmp.cdb
incremental_db/compiled_partitions/part1.root_partition.cmp.dfp
incremental_db/compiled_partitions/part1.root_partition.cmp.hdb
incremental_db/compiled_partitions/part1.root_partition.cmp.kpt
incremental_db/compiled_partitions/part1.root_partition.cmp.logdb
incremental_db/compiled_partitions/part1.root_partition.cmp.rcfdb
incremental_db/compiled_partitions/part1.root_partition.map.cdb
incremental_db/compiled_partitions/part1.root_partition.map.dpi
incremental_db/compiled_partitions/part1.root_partition.map.hbdb.cdb
incremental_db/compiled_partitions/part1.root_partition.map.hbdb.hb_info
incremental_db/compiled_partitions/part1.root_partition.map.hbdb.hdb
incremental_db/compiled_partitions/part1.root_partition.map.hbdb.sig
incremental_db/compiled_partitions/part1.root_partition.map.hdb
incremental_db/compiled_partitions/part1.root_partition.map.kpt
incremental_db/README
output_files/part1.asm.rpt
output_files/part1.done
output_files/part1.eda.rpt
output_files/part1.fit.rpt
output_files/part1.fit.smsg
output_files/part1.fit.summary
output_files/part1.flow.rpt
output_files/part1.jdi
output_files/part1.map.rpt
output_files/part1.map.summary
output_files/part1.pin
output_files/part1.pof
output_files/part1.sof
output_files/part1.sta.rpt
output_files/part1.sta.summary
simulation/modelsim/gate_work/@testbench/_primary.dat
simulation/modelsim/gate_work/@testbench/_primary.dbs
simulation/modelsim/gate_work/@testbench/_primary.vhd
simulation/modelsim/gate_work/@testbench/verilog.prw
simulation/modelsim/gate_work/@testbench/verilog.psm
simulation/modelsim/gate_work/_temp/
simulation/modelsim/gate_work/part1/_primary.dat
simulation/modelsim/gate_work/part1/_primary.dbs
simulation/modelsim/gate_work/part1/_primary.vhd
simulation/modelsim/gate_work/part1/verilog.prw
simulation/modelsim/gate_work/part1/verilog.psm
simulation/modelsim/gate_work/_info
simulation/modelsim/gate_work/_vmake
simulation/modelsim/rtl_work/@testbench/_primary.dat
simulation/modelsim/rtl_work/@testbench/_primary.dbs
simulation/modelsim/rtl_work/@testbench/_primary.vhd
simulation/modelsim/rtl_work/@testbench/verilog.prw
simulation/modelsim/rtl_work/@testbench/verilog.psm
simulation/modelsim/rtl_work/_temp/
simulation/modelsim/rtl_work/part1/_primary.dat
simulation/modelsim/rtl_work/part1/_primary.dbs
simulation/modelsim/rtl_work/part1/_primary.vhd
simulation/modelsim/rtl_work/part1/verilog.prw
simulation/modelsim/rtl_work/part1/verilog.psm
simulation/modelsim/rtl_work/seg/_primary.dat
simulation/modelsim/rtl_work/seg/_primary.dbs
simulation/modelsim/rtl_work/seg/_primary.vhd
simulation/modelsim/rtl_work/seg/verilog.prw
simulation/modelsim/rtl_work/seg/verilog.psm
simulation/modelsim/rtl_work/_info
simulation/modelsim/rtl_work/_vmake
simulation/modelsim/modelsim.ini
simulation/modelsim/msim_transcript
simulation/modelsim/part1.sft
simulation/modelsim/part1.vo
simulation/modelsim/part1_fast.vo
simulation/modelsim/part1_modelsim.xrf
simulation/modelsim/part1_run_msim_gate_verilog.do
simulation/modelsim/part1_run_msim_rtl_verilog.do
simulation/modelsim/part1_run_msim_rtl_verilog.do.bak
simulation/modelsim/part1_run_msim_rtl_verilog.do.bak1
simulation/modelsim/part1_run_msim_rtl_verilog.do.bak10
simulation/modelsim/part1_run_msim_rtl_verilog.do.bak11
simulation/modelsim/part1_run_msim_rtl_verilog.do.bak2
simulation/modelsim/part1_run_msim_rtl_verilog.do.bak3
simulation/modelsim/part1_run_msim_rtl_verilog.do.bak4
simulation/modelsim/part1_run_msim_rtl_verilog.do.bak5
simulation/modelsim/part1_run_msim_rtl_verilog.do.bak6
simulation/modelsim/part1_run_msim_rtl_verilog.do.bak7
simulation/modelsim/part1_run_msim_rtl_verilog.do.bak8
simulation/modelsim/part1_run_msim_rtl_verilog.do.bak9
simulation/modelsim/part