CY7C68013FPGA
CY7C68013FPGA/BulkIn
CY7C68013FPGA/BulkIn/automake.log
CY7C68013FPGA/BulkIn/bitgen.ut
CY7C68013FPGA/BulkIn/coregen.log
CY7C68013FPGA/BulkIn/coregen.prj
CY7C68013FPGA/BulkIn/FPGA.dhp
CY7C68013FPGA/BulkIn/FPGA.npl
CY7C68013FPGA/BulkIn/ISE编程顺序.txt
CY7C68013FPGA/BulkIn/top.bgn
CY7C68013FPGA/BulkIn/top.bit
CY7C68013FPGA/BulkIn/top.bld
CY7C68013FPGA/BulkIn/top.cmd_log
CY7C68013FPGA/BulkIn/top.drc
CY7C68013FPGA/BulkIn/top.lso
CY7C68013FPGA/BulkIn/top.mrp
CY7C68013FPGA/BulkIn/top.msd
CY7C68013FPGA/BulkIn/top.msk
CY7C68013FPGA/BulkIn/top.nc1
CY7C68013FPGA/BulkIn/top.ncd
CY7C68013FPGA/BulkIn/top.ngc
CY7C68013FPGA/BulkIn/top.ngd
CY7C68013FPGA/BulkIn/top.ngm
CY7C68013FPGA/BulkIn/top.ngr
CY7C68013FPGA/BulkIn/top.pad
CY7C68013FPGA/BulkIn/top.pad_txt
CY7C68013FPGA/BulkIn/top.par
CY7C68013FPGA/BulkIn/top.pcf
CY7C68013FPGA/BulkIn/top.placed_ncd_tracker
CY7C68013FPGA/BulkIn/top.prj
CY7C68013FPGA/BulkIn/top.rbb
CY7C68013FPGA/BulkIn/top.rbd
CY7C68013FPGA/BulkIn/top.routed_ncd_tracker
CY7C68013FPGA/BulkIn/top.stx
CY7C68013FPGA/BulkIn/top.syr
CY7C68013FPGA/BulkIn/top.twr
CY7C68013FPGA/BulkIn/top.twx
CY7C68013FPGA/BulkIn/top.ut
CY7C68013FPGA/BulkIn/Top.vhdl
CY7C68013FPGA/BulkIn/top.xpi
CY7C68013FPGA/BulkIn/top_clk分频.txt
CY7C68013FPGA/BulkIn/top_last_par.ncd
CY7C68013FPGA/BulkIn/top_map.ncd
CY7C68013FPGA/BulkIn/top_map.ngm
CY7C68013FPGA/BulkIn/top_pad.csv
CY7C68013FPGA/BulkIn/top_pad.txt
CY7C68013FPGA/BulkIn/ucf.ucf
CY7C68013FPGA/BulkIn/ucf.ucf.untf
CY7C68013FPGA/BulkIn/xst
CY7C68013FPGA/BulkIn/xst/work
CY7C68013FPGA/BulkIn/xst/work/hdllib.ref
CY7C68013FPGA/BulkIn/xst/work/hdpdeps.ref
CY7C68013FPGA/BulkIn/xst/work/sub00
CY7C68013FPGA/BulkIn/xst/work/sub00/vhpl00.vho
CY7C68013FPGA/BulkIn/xst/work/sub00/vhpl01.vho
CY7C68013FPGA/BulkIn/_impact.cmd
CY7C68013FPGA/BulkIn/_impact.log
CY7C68013FPGA/BulkIn/_ngo
CY7C68013FPGA/BulkIn/_ngo/netlist.lst
CY7C68013FPGA/BulkIn/__projnav
CY7C68013FPGA/BulkIn/__projnav/bitgen.rsp
CY7C68013FPGA/BulkIn/__projnav/coregen.rsp
CY7C68013FPGA/BulkIn/__projnav/ednTOngd_tcl.rsp
CY7C68013FPGA/BulkIn/__projnav/FPGA.gfl
CY7C68013FPGA/BulkIn/__projnav/FPGA_flowplus.gfl
CY7C68013FPGA/BulkIn/__projnav/map.log
CY7C68013FPGA/BulkIn/__projnav/nc1TOncd_tcl.rsp
CY7C68013FPGA/BulkIn/__projnav/par.log
CY7C68013FPGA/BulkIn/__projnav/parentEditConstraintsTextApp_tcl.rsp
CY7C68013FPGA/BulkIn/__projnav/posttrc.log
CY7C68013FPGA/BulkIn/__projnav/runXst_tcl.rsp
CY7C68013FPGA/BulkIn/__projnav/top.xst
CY7C68013FPGA/BulkIn/__projnav/top_ncdTOut_tcl.rsp
CY7C68013FPGA/BulkIn/__projnav.log
CY7C68013FPGA/BulkOut
CY7C68013FPGA/BulkOut/automake.log
CY7C68013FPGA/BulkOut/bitgen.ut
CY7C68013FPGA/BulkOut/coregen.log
CY7C68013FPGA/BulkOut/coregen.prj
CY7C68013FPGA/BulkOut/FPGA.dhp
CY7C68013FPGA/BulkOut/FPGA.npl
CY7C68013FPGA/BulkOut/prom.mcs
CY7C68013FPGA/BulkOut/prom.prm
CY7C68013FPGA/BulkOut/prom.sig
CY7C68013FPGA/BulkOut/top.bgn
CY7C68013FPGA/BulkOut/top.bit
CY7C68013FPGA/BulkOut/top.bld
CY7C68013FPGA/BulkOut/top.cmd_log
CY7C68013FPGA/BulkOut/top.drc
CY7C68013FPGA/BulkOut/top.ll
CY7C68013FPGA/BulkOut/top.lso
CY7C68013FPGA/BulkOut/top.mrp
CY7C68013FPGA/BulkOut/top.msd
CY7C68013FPGA/BulkOut/top.msk
CY7C68013FPGA/BulkOut/top.nc1
CY7C68013FPGA/BulkOut/top.ncd
CY7C68013FPGA/BulkOut/top.ngc
CY7C68013FPGA/BulkOut/top.ngd
CY7C68013FPGA/BulkOut/top.ngm
CY7C68013FPGA/BulkOut/top.ngr
CY7C68013FPGA/BulkOut/top.pad
CY7C68013FPGA/BulkOut/top.pad_txt
CY7C68013FPGA/BulkOut/top.par
CY7C68013FPGA/BulkOut/top.pcf
CY7C68013FPGA/BulkOut/top.placed_ncd_tracker
CY7C68013FPGA/BulkOut/top.prj
CY7C68013FPGA/BulkOut/top.rbb
CY7C68013FPGA/BulkOut/top.rbd
CY7C68013FPGA/BulkOut/top.routed_ncd_tracker
CY7C68013FPGA/BulkOut/top.stx
CY7C68013FPGA/BulkOut/top.syr
CY7C68013FPGA/BulkOut/top.twr
CY7C68013FPGA/BulkOut/top.twx
CY7C68013FPGA/BulkOut/top.ut
CY7C68013FPGA/BulkOut/top.vhdl
CY7C68013FPGA/BulkOut/top.xpi
CY7C68013FPGA/BulkOut/top_last_par.ncd
CY7C68013FPGA/BulkOut/top_map.ncd
CY7C68013FPGA/BulkOut/top_map.ngm
CY7C68013FPGA/BulkOut/top_pad.csv
CY7C68013FPGA/BulkOut/top_pad.txt
CY7C68013FPGA/BulkOut/ucf.ucf
CY7C68013FPGA/BulkOut/ucf.ucf.untf
CY7C68013FPGA/BulkOut/xst
CY7C68013FPGA/BulkOut/xst/work
CY7C68013FPGA/BulkOut/xst/work/hdllib.ref
CY7C68013FPGA/BulkOut/xst/work/hdpdeps.ref
CY7C68013FPGA/BulkOut/xst/work/sub00
CY7C68013FPGA/BulkOut/xst/work/sub00/vhpl00.vho
CY7C68013FPGA/BulkOut/xst/work/sub00/vhpl01.vho
CY7C68013FPGA/BulkOut/_impact.cmd
CY7C68013FPGA/BulkOut/_impact.log
CY7C68013FPGA/BulkOut/_ngo
CY7C68013FPGA/BulkOut/_ngo/netlist.lst
CY7C68013FPGA/BulkOut/__projnav
CY7C68013FPGA/BulkOut/__projnav/bitgen.rsp
CY7C68013FPGA/BulkOut/__projnav/coregen.rsp
CY7C68013FPGA/BulkOut/__projnav/ednTOngd_tcl.rsp
CY7C68013FPGA/BulkOut/__projnav/FPGA.gfl
CY7C68013FPGA/BulkOut/__projnav/FPGA_flowplus.gfl
CY7C68013FPGA/BulkOut/__projnav/map.log
CY7C68013FPGA/BulkOut/__projnav/nc1TOncd_tcl.rsp
CY7C68013FPGA/BulkOut/__projnav/par.log
CY7C68013FPGA/BulkOut/__projnav/parentEditConstraintsTextApp_tcl.rsp
CY7C68013FPGA/BulkOut/__projnav/posttrc.log
CY7C68013FPGA/BulkOut/__projnav/runXst_tcl.rsp
CY7C68013FPGA/BulkOut/__projnav/top.xst
CY7C68013FPGA/BulkOut/__projnav/top_ncdTOut_tcl.rsp