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文件名称:cpu

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
  • 上传时间：
    2013-09-05
  • 文件大小：
    3.22mb
  • 已下载：
    0次
  • 提 供 者：
    Bi***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

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8位实验CPU设计利用设计好的指令系统，编写汇编代码，以便测试所有设计的指令及指令涉及的相关功能。设计好测试用的汇编代码后，然后利用Quartus II软件附带的DebugController,编写汇编编译规则。接着，利用DebugController软件把汇编编译之后的二进制代码置入到所采用的存储器中，并对设计好的8位CPU进行测试。-Eight experiments designed CPU design using the instruction set, write assembly code in order to test all commands and instructions that involve the design of related functions. Design a good test of the assembly code, and then use the Quartus II software supplied DebugController, writing assembler rules. Next, the assembly DebugController software binary code compiled into the memory used, and the 8-bit CPU designed for testing.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

cpu/alu.bsf
cpu/alu.vhd
cpu/ar.bsf
cpu/ar.vhd
cpu/asynram.bsf
cpu/asynram.vhd
cpu/bus_dir.bsf
cpu/bus_dir.vhd
cpu/bus_mux.bsf
cpu/bus_mux.vhd
cpu/cmp_state.ini
cpu/controller.bsf
cpu/controller.vhd
cpu/cpu.asm.rpt
cpu/cpu.bdf
cpu/cpu.done
cpu/cpu.fit.eqn
cpu/cpu.fit.rpt
cpu/cpu.fit.summary
cpu/cpu.flow.rpt
cpu/cpu.map.eqn
cpu/cpu.map.rpt
cpu/cpu.map.summary
cpu/cpu.pin
cpu/cpu.pof
cpu/cpu.qpf
cpu/cpu.qsf
cpu/cpu.qws
cpu/cpu.sim.rpt
cpu/cpu.sof
cpu/cpu.tan.rpt
cpu/cpu.tan.summary
cpu/cpu.vhd
cpu/cpu.vwf
cpu/db/add_sub_4ih.tdf
cpu/db/add_sub_5ih.tdf
cpu/db/add_sub_djh.tdf
cpu/db/ar.(0).cnf.cdb
cpu/db/ar.(0).cnf.hdb
cpu/db/ar.asm.qmsg
cpu/db/ar.cbx.xml
cpu/db/ar.cmp.cdb
cpu/db/ar.cmp.hdb
cpu/db/ar.cmp.rdb
cpu/db/ar.cmp.tdb
cpu/db/ar.cmp0.ddb
cpu/db/ar.db_info
cpu/db/ar.eco.cdb
cpu/db/ar.fit.qmsg
cpu/db/ar.hier_info
cpu/db/ar.hif
cpu/db/ar.map.cdb
cpu/db/ar.map.hdb
cpu/db/ar.map.qmsg
cpu/db/ar.pre_map.cdb
cpu/db/ar.pre_map.hdb
cpu/db/ar.psp
cpu/db/ar.rtlv.hdb
cpu/db/ar.rtlv_sg.cdb
cpu/db/ar.rtlv_sg_swap.cdb
cpu/db/ar.sgdiff.cdb
cpu/db/ar.sgdiff.hdb
cpu/db/ar.sld_design_entry.sci
cpu/db/ar.sld_design_entry_dsc.sci
cpu/db/ar.syn_hier_info
cpu/db/ar.tan.qmsg
cpu/db/ar_cmp.qrpt
cpu/db/bus_dir.(0).cnf.cdb
cpu/db/bus_dir.(0).cnf.hdb
cpu/db/bus_dir.asm.qmsg
cpu/db/bus_dir.cbx.xml
cpu/db/bus_dir.cmp.cdb
cpu/db/bus_dir.cmp.hdb
cpu/db/bus_dir.cmp.rdb
cpu/db/bus_dir.cmp.tdb
cpu/db/bus_dir.cmp0.ddb
cpu/db/bus_dir.db_info
cpu/db/bus_dir.eco.cdb
cpu/db/bus_dir.fit.qmsg
cpu/db/bus_dir.hier_info
cpu/db/bus_dir.hif
cpu/db/bus_dir.map.cdb
cpu/db/bus_dir.map.hdb
cpu/db/bus_dir.map.qmsg
cpu/db/bus_dir.pre_map.cdb
cpu/db/bus_dir.pre_map.hdb
cpu/db/bus_dir.psp
cpu/db/bus_dir.rtlv.hdb
cpu/db/bus_dir.rtlv_sg.cdb
cpu/db/bus_dir.rtlv_sg_swap.cdb
cpu/db/bus_dir.sgdiff.cdb
cpu/db/bus_dir.sgdiff.hdb
cpu/db/bus_dir.sld_design_entry.sci
cpu/db/bus_dir.sld_design_entry_dsc.sci
cpu/db/bus_dir.syn_hier_info
cpu/db/bus_dir.tan.qmsg
cpu/db/bus_dir_cmp.qrpt
cpu/db/bus_mux.(0).cnf.cdb
cpu/db/bus_mux.(0).cnf.hdb
cpu/db/bus_mux.asm.qmsg
cpu/db/bus_mux.cbx.xml
cpu/db/bus_mux.cmp.cdb
cpu/db/bus_mux.cmp.hdb
cpu/db/bus_mux.cmp.rdb
cpu/db/bus_mux.cmp.tdb
cpu/db/bus_mux.cmp0.ddb
cpu/db/bus_mux.db_info
cpu/db/bus_mux.eco.cdb
cpu/db/bus_mux.fit.qmsg
cpu/db/bus_mux.hier_info
cpu/db/bus_mux.hif
cpu/db/bus_mux.map.cdb
cpu/db/bus_mux.map.hdb
cpu/db/bus_mux.map.qmsg
cpu/db/bus_mux.pre_map.cdb
cpu/db/bus_mux.pre_map.hdb
cpu/db/bus_mux.psp
cpu/db/bus_mux.rtlv.hdb
cpu/db/bus_mux.rtlv_sg.cdb
cpu/db/bus_mux.rtlv_sg_swap.cdb
cpu/db/bus_mux.sgdiff.cdb
cpu/db/bus_mux.sgdiff.hdb
cpu/db/bus_mux.sld_design_entry.sci
cpu/db/bus_mux.sld_design_entry_dsc.sci
cpu/db/bus_mux.syn_hier_info
cpu/db/bus_mux.tan.qmsg
cpu/db/bus_mux_cmp.qrpt
cpu/db/controller.(0).cnf.cdb
cpu/db/controller.(0).cnf.hdb
cpu/db/controller.asm.qmsg
cpu/db/controller.cbx.xml
cpu/db/controller.cmp.cdb
cpu/db/controller.cmp.hdb
cpu/db/controller.cmp.rdb
cpu/db/controller.cmp.tdb
cpu/db/controller.cmp0.ddb
cpu/db/controller.db_info
cpu/db/controller.eco.cdb
cpu/db/controller.fit.qmsg
cpu/db/controller.hier_info
cpu/db/controller.hif
cpu/db/controller.map.cdb
cpu/db/controller.map.hdb
cpu/db/controller.map.qmsg
cpu/db/controller.pre_map.cdb
cpu/db/controller.pre_map.hdb
cpu/db/controller.psp
cpu/db/controller.rtlv.hdb
cpu/db/controller.rtlv_sg.cdb
cpu/db/controller.rtlv_sg_swap.cdb
cpu/db/controller.sgdiff.cdb
cpu/db/controller.sgdiff.hdb
cpu/db/controller.sld_design_entry.sci
cpu/db/controller.sld_design_entry_dsc.sci
cpu/db/controller.syn_hier_info
cpu/db/controller.tan.qmsg
cpu/db/controller_cmp.qrpt
cpu/db/cpu.(0).cnf.cdb
cpu/db/cpu.(0).cnf.hdb
cpu/db/cpu.(1).cnf.cdb
cpu/db/cpu.(1).cnf.hdb
cpu/db/cpu.(10).cnf.cdb
cpu/db/cpu.(10).cnf.hdb
cpu/db/cpu.(11).cnf.cdb
cpu/db/cpu.(11).cnf.hdb
cpu/db/cpu.(12).cnf.cdb
cpu/db/cpu.(12).cnf.hdb
cpu/db/cpu.(13).cnf.cdb
cpu/db/cpu.(13).cnf.hdb
cpu/db/cpu.(14).cnf.cdb
cpu/db/cpu.(14).cnf.hdb
cpu/db/cpu.(15).cnf.cdb
cpu/db/cpu.(15).cnf.hdb
cpu/db/cpu.(16).cnf.cdb
cpu/db/cpu.(16).cnf.hdb
cpu/db/cpu.(17).cnf.cdb
cpu/db/cpu.(17).cnf.hdb
cpu/db/cpu.(18).cnf.cdb
cpu/db/cpu.(18).cnf.hdb
cpu/db/cpu.(19).cnf.cdb
cpu/db/cpu.(19).cnf.hdb
cpu/db/cpu.(2).cnf.cdb
cpu/db/cpu.(2).cnf.hdb
cpu/db/cpu.(20).cnf.cdb
cpu/db/cpu.(20).cnf.hdb
cpu/db/cpu.(21).cnf.cdb
cpu/db/cpu.(21).cnf.hdb
cpu/db/cpu.(22).cnf.cdb
cpu/db/cpu.(22).cnf.hdb
cpu/db/cpu.(23).cnf.cdb
cpu/db/cpu.(23).cnf.hdb
cpu/db/cpu.(24).cnf.cdb
cpu/db/cpu.(24).cnf.hdb
cpu/db/cpu.(25).cnf.cdb
cpu/db/cpu.(25).cnf.hdb
cpu/db/cpu.(26).cnf.cdb
cpu/db/cpu.(26).cnf.hdb
cpu/db/cpu.(27).cnf.cdb
cpu/db/cpu.(27).cnf.hdb
cpu/db/cpu.(28).cnf.cdb
cpu/db/cpu.(28).cnf.hdb
cpu/db/cpu.(3).cnf.cdb
cpu/db/cpu.(3).cnf.hdb
cpu/db/cpu.(4).cnf.cdb
cpu/db/cpu.(4).cnf.hdb
cpu/db/cpu.(5).cnf.cdb
cpu/db/cpu.(5).cnf.hdb
cpu/db/cpu.(6).cnf.cdb
cpu/db/cpu.(6).cnf.hdb
cpu/db/cpu.(7).cnf.cdb
cpu/db/cpu.(7).cnf.hdb
cpu/db/cpu.(8).cnf.cdb
cpu/db/cpu.(8).cnf.hdb
cpu/db/cpu.(9).cnf.cdb
cpu/db/cpu.(9).cnf.hdb
cpu/db/cpu.asm.qmsg
cpu/db/cpu.cbx.xml
cpu/db/cpu.cmp.cdb
cpu/db/cpu.cmp.hdb
cpu/db/cpu.cmp.rdb
cpu/db/cpu.cmp.tdb
cpu/db/cpu.cmp0.ddb
cpu/db/cpu.db_info
cpu/db/cpu.eco.cdb
cpu/db/cpu

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