standard/altera_avalon_sd_mmc_spi/
standard/altera_avalon_sd_mmc_spi/altera_avalon_sd_mmc_spi_sw.tcl
standard/altera_avalon_sd_mmc_spi/elca.gif
standard/altera_avalon_sd_mmc_spi/HAL/
standard/altera_avalon_sd_mmc_spi/HAL/inc/
standard/altera_avalon_sd_mmc_spi/HAL/inc/altera_avalon_sd_mmc_spi.h
standard/altera_avalon_sd_mmc_spi/HAL/lib/
standard/altera_avalon_sd_mmc_spi/HAL/lib/libaltera_avalon_sd_mmc_spi.a
standard/altera_avalon_sd_mmc_spi/HAL/src/
standard/altera_avalon_sd_mmc_spi/HAL/src/component.mk
standard/altera_avalon_sd_mmc_spi/hdl/
standard/altera_avalon_sd_mmc_spi/hdl/ip_sd_mmc_spi.ocp
standard/altera_avalon_sd_mmc_spi/hdl/ip_sd_mmc_spi.vhd
standard/altera_avalon_sd_mmc_spi/inc/
standard/altera_avalon_sd_mmc_spi/inc/altera_avalon_sd_mmc_spi_regs.h
standard/altera_avalon_sd_mmc_spi/ip_sd_mmc_spi.ocp
standard/altera_avalon_sd_mmc_spi/ip_sd_mmc_spi.vhd
standard/altera_avalon_sd_mmc_spi/ip_sd_mmc_spi_hw.tcl
standard/altera_avalon_sd_mmc_spi/ip_sd_mmc_spi_wrapper.vhd
standard/altpllpll.ppf
standard/altpllpll.v
standard/altpllpll_bb.v
standard/alt_mem_phy_defines.v
standard/alt_mem_phy_sequencer.vhd
standard/auk_ddr_hp_controller.vhd
standard/auk_ddr_hp_init.ocp
standard/board_settings.tcl
standard/button_pio.v
standard/clock_0.v
standard/clock_1.v
standard/cpu.ocp
standard/cpu.v
standard/cpu.vo
standard/cpu_bht_ram.mif
standard/cpu_dc_tag_ram.mif
standard/cpu_ddr_clock_bridge.v
standard/cpu_ic_tag_ram.mif
standard/cpu_jtag_debug_module.v
standard/cpu_jtag_debug_module_wrapper.v
standard/cpu_mult_cell.v
standard/cpu_ociram_default_contents.mif
standard/cpu_rf_ram_a.mif
standard/cpu_rf_ram_b.mif
standard/cpu_test_bench.v
standard/cycloneIII_embedded_evaluation_kit_standard.asm.rpt
standard/cycloneIII_embedded_evaluation_kit_standard.done
standard/cycloneIII_embedded_evaluation_kit_standard.fit.rpt
standard/cycloneIII_embedded_evaluation_kit_standard.fit.smsg
standard/cycloneIII_embedded_evaluation_kit_standard.fit.summary
standard/cycloneIII_embedded_evaluation_kit_standard.flow.rpt
standard/cycloneIII_embedded_evaluation_kit_standard.jdi
standard/cycloneIII_embedded_evaluation_kit_standard.map.rpt
standard/cycloneIII_embedded_evaluation_kit_standard.map.smsg
standard/cycloneIII_embedded_evaluation_kit_standard.map.summary
standard/cycloneIII_embedded_evaluation_kit_standard.pin
standard/cycloneIII_embedded_evaluation_kit_standard.qpf
standard/cycloneIII_embedded_evaluation_kit_standard.qsf
standard/cycloneIII_embedded_evaluation_kit_standard.qws
standard/cycloneIII_embedded_evaluation_kit_standard.sdc
standard/cycloneIII_embedded_evaluation_kit_standard.sof
standard/cycloneIII_embedded_evaluation_kit_standard.sta.rpt
standard/cycloneIII_embedded_evaluation_kit_standard.sta.summary
standard/cycloneIII_embedded_evaluation_kit_standard.v
standard/cycloneIII_embedded_evaluation_kit_standard_assignment_defaults.qdf
standard/cycloneIII_embedded_evaluation_kit_standard_settings.tcl
standard/cycloneIII_embedded_evaluation_kit_standard_sopc.bsf
standard/cycloneIII_embedded_evaluation_kit_standard_sopc.ptf
standard/cycloneIII_embedded_evaluation_kit_standard_sopc.ptf.bak
standard/cycloneIII_embedded_evaluation_kit_standard_sopc.ptf.pre_generation_ptf
standard/cycloneIII_embedded_evaluation_kit_standard_sopc.qip
standard/cycloneIII_embedded_evaluation_kit_standard_sopc.sopc
standard/cycloneIII_embedded_evaluation_kit_standard_sopc.v
standard/cycloneIII_embedded_evaluation_kit_standard_sopc_generation_script
standard/cycloneIII_embedded_evaluation_kit_standard_sopc_log.txt
standard/cycloneIII_embedded_evaluation_kit_standard_sopc_setup_quartus.tcl
standard/ddr_o.vhd
standard/ddr_sdram.html
standard/ddr_sdram.ppf
standard/ddr_sdram.qip
standard/ddr_sdram.v
standard/ddr_sdram_auk_ddr_hp_controller_wrapper.v
standard/ddr_sdram_auk_ddr_hp_controller_wrapper.vo
standard/ddr_sdram_controller_phy.v
standard/ddr_sdram_example_driver.v
standard/ddr_sdram_example_top.v
standard/ddr_sdram_ex_lfsr8.v
standard/ddr_sdram_phy.html
standard/ddr_sdram_phy.qip
standard/ddr_sdram_phy.v
standard/ddr_sdram_phy_alt_mem_phy_ciii.v
standard/ddr_sdram_phy_alt_mem_phy_pll_ciii.ppf
standard/ddr_sdram_phy_alt_mem_phy_pll_ciii.v
standard/ddr_sdram_phy_alt_mem_phy_pll_ciii.v_.bak
standard/ddr_sdram_phy_alt_mem_phy_pll_ciii_bb.v
standard/ddr_sdram_phy_alt_mem_phy_sequencer_wrapper.v
standard/ddr_sdram_phy_alt_mem_phy_sequencer_wrapper.vo
standard/ddr_sdram_phy_autodetectedpins.tcl
standard/ddr_sdram_phy_ddr_pins.tcl
standard/ddr_sdram_phy_ddr_timing.sdc
standard/ddr_sdram_phy_report_timing.tcl
standard/ddr_sdram_phy_simgen_init.txt
standard/ddr_sdram_pin_assignments.tcl
standard/ddr_sdram_pin_assignments_source.tcl
standard/ddr_sdram_test_component.v
standard/descriptor_memory.hex
standard/descriptor_memory.v
standard/descriptor_offset_bridge.v
standard/el_camino_sd_card_controller.v
standard/el_camino_sd_card_controller.vo
standard/flash_ssram_pipeline_bridge.v
standard/gmii_mii_mux.vhd
standard/jtag_uart.v
standard/lcd_32_to_8_bits_dfa.v
standard/lcd_32_to_8_bits_dfa.vo
standard/lcd_32_to_8_bits_dfa_data_ram.v
standard/lcd_32_to_8_bits_dfa_state_ram.v
standard/