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文件名称:ram

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [C/C++] [源码]
  • 上传时间：
    2013-11-13
  • 文件大小：
    1.96mb
  • 已下载：
    0次
  • 提 供 者：
    王***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

练习调用双口ram,fpga自产生65536个递增数，6.25Hz输出，在20ms内读出。-Exercises called dual port ram, fpga increasing number of self-produced 65536, 6.25Hz output within 20ms readout.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

ram/coregen_xil_2972_46.cgc
ram/coregen_xil_2972_46.cgp
ram/fuse.log
ram/ipcore_dir/blk_mem_gen_ds512.pdf
ram/ipcore_dir/blk_mem_gen_readme.txt
ram/ipcore_dir/r.asy
ram/ipcore_dir/r.gise
ram/ipcore_dir/r.ncf
ram/ipcore_dir/r.ngc
ram/ipcore_dir/r.sym
ram/ipcore_dir/r.v
ram/ipcore_dir/r.veo
ram/ipcore_dir/r.vhd
ram/ipcore_dir/r.vho
ram/ipcore_dir/r.xco
ram/ipcore_dir/r.xise
ram/ipcore_dir/ram.asy
ram/ipcore_dir/ram.gise
ram/ipcore_dir/ram.ncf
ram/ipcore_dir/ram.ngc
ram/ipcore_dir/ram.sym
ram/ipcore_dir/ram.v
ram/ipcore_dir/ram.veo
ram/ipcore_dir/ram.vhd
ram/ipcore_dir/ram.vho
ram/ipcore_dir/ram.xco
ram/ipcore_dir/ram.xise
ram/ipcore_dir/ram_flist.txt
ram/ipcore_dir/ram_xmdf.tcl
ram/ipcore_dir/r_flist.txt
ram/ipcore_dir/r_xmdf.tcl
ram/ipcore_dir/_xmsgs/ngcbuild.xmsgs
ram/ipcore_dir/_xmsgs/pn_parser.xmsgs
ram/ipcore_dir/_xmsgs/xst.xmsgs
ram/iseconfig/ram.projectmgr
ram/iseconfig/ram.xreport
ram/isim/isim_usage_statistics.html
ram/isim/ramtf_isim_beh.exe.sim/isimcrash.log
ram/isim/ramtf_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
ram/isim/ramtf_isim_beh.exe.sim/isimkernel.log
ram/isim/ramtf_isim_beh.exe.sim/netId.dat
ram/isim/ramtf_isim_beh.exe.sim/ramtf_isim_beh.exe
ram/isim/ramtf_isim_beh.exe.sim/tmp_save/_1
ram/isim/ramtf_isim_beh.exe.sim/work/m_00000000001664380267_3373015174.c
ram/isim/ramtf_isim_beh.exe.sim/work/m_00000000001664380267_3373015174.didat
ram/isim/ramtf_isim_beh.exe.sim/work/m_00000000001664380267_3373015174.nt.obj
ram/isim/ramtf_isim_beh.exe.sim/work/m_00000000002013452923_2073120511.c
ram/isim/ramtf_isim_beh.exe.sim/work/m_00000000002013452923_2073120511.didat
ram/isim/ramtf_isim_beh.exe.sim/work/m_00000000002013452923_2073120511.nt.obj
ram/isim/ramtf_isim_beh.exe.sim/work/m_00000000002897349074_0450250084.c
ram/isim/ramtf_isim_beh.exe.sim/work/m_00000000002897349074_0450250084.didat
ram/isim/ramtf_isim_beh.exe.sim/work/m_00000000002897349074_0450250084.nt.obj
ram/isim/ramtf_isim_beh.exe.sim/work/m_00000000003394450299_1743096917.c
ram/isim/ramtf_isim_beh.exe.sim/work/m_00000000003394450299_1743096917.didat
ram/isim/ramtf_isim_beh.exe.sim/work/m_00000000003394450299_1743096917.nt.obj
ram/isim/ramtf_isim_beh.exe.sim/work/ramtf_isim_beh.exe_main.c
ram/isim/ramtf_isim_beh.exe.sim/work/ramtf_isim_beh.exe_main.nt.obj
ram/isim/ramtf_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000000414557669_0777280482.c
ram/isim/ramtf_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000000414557669_0777280482.didat
ram/isim/ramtf_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000000414557669_0777280482.nt.obj
ram/isim/ramtf_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000001036818086_0951808188.c
ram/isim/ramtf_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000001036818086_0951808188.didat
ram/isim/ramtf_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000001036818086_0951808188.nt.obj
ram/isim/ramtf_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000001184809869_3076651399.c
ram/isim/ramtf_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000001184809869_3076651399.didat
ram/isim/ramtf_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000001184809869_3076651399.nt.obj
ram/isim/ramtf_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000002216354146_2633657591.c
ram/isim/ramtf_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000002216354146_2633657591.didat
ram/isim/ramtf_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000002216354146_2633657591.nt.obj
ram/isim/ram_isim_beh.exe.sim/isimcrash.log
ram/isim/ram_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
ram/isim/ram_isim_beh.exe.sim/isimkernel.log
ram/isim/ram_isim_beh.exe.sim/netId.dat
ram/isim/ram_isim_beh.exe.sim/ram_isim_beh.exe
ram/isim/ram_isim_beh.exe.sim/tmp_save/_1
ram/isim/ram_isim_beh.exe.sim/work/m_00000000001664380267_3373015174.c
ram/isim/ram_isim_beh.exe.sim/work/m_00000000001664380267_3373015174.didat
ram/isim/ram_isim_beh.exe.sim/work/m_00000000001664380267_3373015174.nt.obj
ram/isim/ram_isim_beh.exe.sim/work/m_00000000002013452923_2073120511.c
ram/isim/ram_isim_beh.exe.sim/work/m_00000000002013452923_2073120511.didat
ram/isim/ram_isim_beh.exe.sim/work/m_00000000002013452923_2073120511.nt.obj
ram/isim/ram_isim_beh.exe.sim/work/m_00000000002897349074_0450250084.c
ram/isim/ram_isim_beh.exe.sim/work/m_00000000002897349074_0450250084.didat
ram/isim/ram_isim_beh.exe.sim/work/m_00000000002897349074_0450250084.nt.obj
ram/isim/ram_isim_beh.exe.sim/work/ram_isim_beh.exe_main.c
ram/isim/ram_isim_beh.exe.sim/work/ram_isim_beh.exe_main.nt.obj
ram/isim/ram_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000000414557669_0777280482.c
ram/isim/ram_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000000414557669_0777280482.didat
ram/isim/ram_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000000414557669_0777280482.nt.obj
ram/isim/ram_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000001036818086_0951808188.c
ram/isim/ram_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000001036818086_0951808188.didat
ram/isim/ram_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000001036818086_0951808188.nt.obj
ram/isim/ram_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000001184809869_3076651399.c
ram/isim/ram_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000001184809869_3076651399.didat
ram/isim/ram_isim_

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