文件名称:Example-b8-5
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- 上传时间：2014-04-06
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文件大小：11.36kb
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学习VCD文件的基本使用方法,四态的VCD文件，参数在0/1/X/Z之间变化，没有信号的强度信息-Learn the basics of using VCD files,Four state VCD file, change the parameters between 0/1/X/Z no signal strength information
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下载文件列表
Example-b8-5/demo_project/counter.v
Example-b8-5/demo_project/myvcdfile.vcd
Example-b8-5/demo_project/tcounter.v
Example-b8-5/demo_project/work/counter/verilog.asm
Example-b8-5/demo_project/work/counter/_primary.dat
Example-b8-5/demo_project/work/counter/_primary.vhd
Example-b8-5/demo_project/work/test_counter/verilog.asm
Example-b8-5/demo_project/work/test_counter/_primary.dat
Example-b8-5/demo_project/work/test_counter/_primary.vhd
Example-b8-5/demo_project/work/_info
Example-b8-5/Source/counter.v
Example-b8-5/Source/tcounter.v
Example-b8-5/示例说明.doc
Example-b8-5/demo_project/work/counter
Example-b8-5/demo_project/work/test_counter
Example-b8-5/demo_project/work
Example-b8-5/demo_project
Example-b8-5/Source
Example-b8-5
Example-b8-5/demo_project/myvcdfile.vcd
Example-b8-5/demo_project/tcounter.v
Example-b8-5/demo_project/work/counter/verilog.asm
Example-b8-5/demo_project/work/counter/_primary.dat
Example-b8-5/demo_project/work/counter/_primary.vhd
Example-b8-5/demo_project/work/test_counter/verilog.asm
Example-b8-5/demo_project/work/test_counter/_primary.dat
Example-b8-5/demo_project/work/test_counter/_primary.vhd
Example-b8-5/demo_project/work/_info
Example-b8-5/Source/counter.v
Example-b8-5/Source/tcounter.v
Example-b8-5/示例说明.doc
Example-b8-5/demo_project/work/counter
Example-b8-5/demo_project/work/test_counter
Example-b8-5/demo_project/work
Example-b8-5/demo_project
Example-b8-5/Source
Example-b8-5
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