文件名称:Example-b8-3
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- 上传时间:2014-04-06
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文件大小:12.25kb
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介绍说明--下载内容来自于网络,使用问题请自行百度
学习使用DO文件进行仿真的基本方法,根据ModelSim提供的命令或者Tcl/Tk语言的语法,将仿真Cmd流程的仿真命令依次编写到扩展名为“do”的宏文件中,然后直接执行这个DO文件,就可以完成整个仿真流程-DO learn how to use basic file simulation method, according to the syntax of the command or ModelSim provides Tcl/Tk language will flow simulation simulation Cmd command sequence written to the macro file extension "do" in, and then execute the file directly DO , you can complete the entire simulation process
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下载文件列表
Example-b8-3/counter.do
Example-b8-3/counter.v
Example-b8-3/stimulus.do
Example-b8-3/vsim.wlf
Example-b8-3/work/counter/verilog.asm
Example-b8-3/work/counter/_primary.dat
Example-b8-3/work/counter/_primary.vhd
Example-b8-3/work/_info
Example-b8-3/示例说明.doc
Example-b8-3/work/counter
Example-b8-3/work
Example-b8-3
Example-b8-3/counter.v
Example-b8-3/stimulus.do
Example-b8-3/vsim.wlf
Example-b8-3/work/counter/verilog.asm
Example-b8-3/work/counter/_primary.dat
Example-b8-3/work/counter/_primary.vhd
Example-b8-3/work/_info
Example-b8-3/示例说明.doc
Example-b8-3/work/counter
Example-b8-3/work
Example-b8-3
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