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文件名称:RAM_basic

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [C/C++] [源码]
  • 上传时间：
    2014-10-05
  • 文件大小：
    1.05mb
  • 已下载：
    0次
  • 提 供 者：
    San****
  • 相关连接：
    无
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修正介绍说明

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RAM Implementation using Verilog Codes
(系统自动生成,下载前可以参看下载内容)

下载文件列表

RAM_basic/.lso
RAM_basic/.prj
RAM_basic/.stx
RAM_basic/.xst
RAM_basic/fuse.log
RAM_basic/fuse.xmsgs
RAM_basic/fuseRelaunch.cmd
RAM_basic/iseconfig/raminfr.xreport
RAM_basic/iseconfig/RAM_basic.projectmgr
RAM_basic/iseconfig/RAM_Read.xreport
RAM_basic/iseconfig/rominfr.xreport
RAM_basic/isim/isim_usage_statistics.html
RAM_basic/isim/pn_info
RAM_basic/isim/raminfr_isim_beh.exe.sim/isimcrash.log
RAM_basic/isim/raminfr_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
RAM_basic/isim/raminfr_isim_beh.exe.sim/isimkernel.log
RAM_basic/isim/raminfr_isim_beh.exe.sim/libPortability.dll
RAM_basic/isim/raminfr_isim_beh.exe.sim/netId.dat
RAM_basic/isim/raminfr_isim_beh.exe.sim/raminfr_isim_beh.exe
RAM_basic/isim/raminfr_isim_beh.exe.sim/tmp_save/_1
RAM_basic/isim/raminfr_isim_beh.exe.sim/work/m_00000000001790781488_2509312541.c
RAM_basic/isim/raminfr_isim_beh.exe.sim/work/m_00000000001790781488_2509312541.didat
RAM_basic/isim/raminfr_isim_beh.exe.sim/work/m_00000000001790781488_2509312541.nt64.obj
RAM_basic/isim/raminfr_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.c
RAM_basic/isim/raminfr_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.didat
RAM_basic/isim/raminfr_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.nt64.obj
RAM_basic/isim/raminfr_isim_beh.exe.sim/work/raminfr_isim_beh.exe_main.c
RAM_basic/isim/raminfr_isim_beh.exe.sim/work/raminfr_isim_beh.exe_main.nt64.obj
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/isimcrash.log
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/isimkernel.log
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/libPortability.dll
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/netId.dat
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/RAM_READ_WAVE_isim_beh.exe
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/tmp_save/_1
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/work/m_00000000000201444265_2509312541.c
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/work/m_00000000000201444265_2509312541.didat
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/work/m_00000000000201444265_2509312541.nt64.obj
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/work/m_00000000003598685204_3959800835.c
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/work/m_00000000003598685204_3959800835.didat
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/work/m_00000000003598685204_3959800835.nt64.obj
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.c
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.didat
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.nt64.obj
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/work/RAM_READ_WAVE_isim_beh.exe_main.c
RAM_basic/isim/RAM_READ_WAVE_isim_beh.exe.sim/work/RAM_READ_WAVE_isim_beh.exe_main.nt64.obj
RAM_basic/isim/rominfr_isim_beh.exe.sim/isimcrash.log
RAM_basic/isim/rominfr_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
RAM_basic/isim/rominfr_isim_beh.exe.sim/isimkernel.log
RAM_basic/isim/rominfr_isim_beh.exe.sim/libPortability.dll
RAM_basic/isim/rominfr_isim_beh.exe.sim/netId.dat
RAM_basic/isim/rominfr_isim_beh.exe.sim/rominfr_isim_beh.exe
RAM_basic/isim/rominfr_isim_beh.exe.sim/tmp_save/_1
RAM_basic/isim/rominfr_isim_beh.exe.sim/work/m_00000000003378025844_2946200429.c
RAM_basic/isim/rominfr_isim_beh.exe.sim/work/m_00000000003378025844_2946200429.didat
RAM_basic/isim/rominfr_isim_beh.exe.sim/work/m_00000000003378025844_2946200429.nt64.obj
RAM_basic/isim/rominfr_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.c
RAM_basic/isim/rominfr_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.didat
RAM_basic/isim/rominfr_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.nt64.obj
RAM_basic/isim/rominfr_isim_beh.exe.sim/work/rominfr_isim_beh.exe_main.c
RAM_basic/isim/rominfr_isim_beh.exe.sim/work/rominfr_isim_beh.exe_main.nt64.obj
RAM_basic/isim/work/glbl.sdb
RAM_basic/isim/work/rominfr.sdb
RAM_basic/isim.cmd
RAM_basic/isim.log
RAM_basic/raminfr.cmd_log
RAM_basic/raminfr.lso
RAM_basic/raminfr.ngc
RAM_basic/raminfr.ngr
RAM_basic/raminfr.prj
RAM_basic/raminfr.stx
RAM_basic/raminfr.syr
RAM_basic/raminfr.xst
RAM_basic/raminfr_envsettings.html
RAM_basic/raminfr_isim_beh.exe
RAM_basic/raminfr_isim_beh1.wdb
RAM_basic/raminfr_summary.html
RAM_basic/raminfr_xst.xrpt
RAM_basic/RAM_basic.gise
RAM_basic/RAM_basic.xise
RAM_basic/RAM_Read.v
RAM_basic/RAM_Read_summary.html
RAM_basic/RAM_READ_WAVE.v
RAM_basic/RAM_READ_WAVE_beh.prj
RAM_basic/RAM_READ_WAVE_isim_beh.exe
RAM_basic/RAM_READ_WAVE_isim_beh.wdb
RAM_basic/rominfr.cmd_log
RAM_basic/rominfr.lso
RAM_basic/rominfr.ngc
RAM_basic/rominfr.ngr
RAM_basic/rominfr.prj
RAM_basic/rominfr.stx
RAM_basic/rominfr.syr
RAM_basic/rominfr.xst
RAM_basic/rominfr_beh.prj
RAM_basic/rominfr_envsettings.html
RAM_basic/rominfr_isim_beh.exe
RAM_basic/rominfr_isim_beh.wdb
RAM_basic/rominfr_summary.html
RAM_basic/rominfr_xst.xrpt
RAM_basic/webtalk_pn.xml
RAM_basic/xilinxsim.ini
RAM_basic/xst/work/hdllib.ref
RAM_basic/xst/work/vlg0D/rominfr.bin
RAM_basic/xst/work/vlg27/raminfr.bin
RAM_basic/_xmsgs/pn_parse

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