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文件名称:Matlab-and-FPGA

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    2014-12-01
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这里包含《无线通信FPGA设计》这本书的所有Matlab和Verilog代码-Here contains design wireless communication FPGA  this book in all Matlab and Verilog code
(系统自动生成,下载前可以参看下载内容)

下载文件列表

Matlab and FPGA/matlab代码/matlab/c10/c.mat
Matlab and FPGA/matlab代码/matlab/c10/costas.m
Matlab and FPGA/matlab代码/matlab/c10/frame_syn.m
Matlab and FPGA/matlab代码/matlab/c10/PLLC.m
Matlab and FPGA/matlab代码/matlab/c10/RRCrece.m
Matlab and FPGA/matlab代码/matlab/c10/RRCsend.m
Matlab and FPGA/matlab代码/matlab/c10/symbol_syn.m
Matlab and FPGA/matlab代码/matlab/c11/adpeq.m
Matlab and FPGA/matlab代码/matlab/c11/ante.m
Matlab and FPGA/matlab代码/matlab/c11/FFTlms.m
Matlab and FPGA/matlab代码/matlab/c11/lms.m
Matlab and FPGA/matlab代码/matlab/c11/RLS.m
Matlab and FPGA/matlab代码/matlab/c11/signlms.m
Matlab and FPGA/matlab代码/matlab/c11/WHT.m
Matlab and FPGA/matlab代码/matlab/c11/WHTlms.m
Matlab and FPGA/matlab代码/matlab/c12/correce.m
Matlab and FPGA/matlab代码/matlab/c12/matchfil.m
Matlab and FPGA/matlab代码/matlab/c12/rake.m
Matlab and FPGA/matlab代码/matlab/c13/cell_search_cpich.m
Matlab and FPGA/matlab代码/matlab/c13/ovsf.m
Matlab and FPGA/matlab代码/matlab/c13/scramble.m
Matlab and FPGA/matlab代码/matlab/c13/wcdmasource.m
Matlab and FPGA/matlab代码/matlab/c6/impinvar_bilinear.m
Matlab and FPGA/matlab代码/matlab/c6/rcosflt_filter.m
Matlab and FPGA/matlab代码/matlab/c6/rcosine_filter.m
Matlab and FPGA/matlab代码/matlab/c7/cicde.m
Matlab and FPGA/matlab代码/matlab/c7/CICdec.m
Matlab and FPGA/matlab代码/matlab/c7/cicin.m
Matlab and FPGA/matlab代码/matlab/c7/CICinterp.m
Matlab and FPGA/matlab代码/matlab/c7/halfdec.m
Matlab and FPGA/matlab代码/matlab/c7/halfinterp.m
Matlab and FPGA/matlab代码/matlab/c7/hbfil.m
Matlab and FPGA/matlab代码/matlab/c7/multirece.m
Matlab and FPGA/matlab代码/matlab/c7/multisend.m
Matlab and FPGA/matlab代码/matlab/c8/ASKmod.m
Matlab and FPGA/matlab代码/matlab/c8/F2T.m
Matlab and FPGA/matlab代码/matlab/c8/LPF.m
Matlab and FPGA/matlab代码/matlab/c8/MSKmod.m
Matlab and FPGA/matlab代码/matlab/c8/OFDMmod.m
Matlab and FPGA/matlab代码/matlab/c8/QAMmod.m
Matlab and FPGA/matlab代码/matlab/c8/QPSKmod.m
Matlab and FPGA/matlab代码/matlab/c8/T2F.m
Matlab and FPGA/matlab代码/matlab/c9/convcode.m
Matlab and FPGA/matlab代码/matlab/c9/CRCcheck.m
Matlab and FPGA/matlab代码/matlab/c9/encoderm.m
Matlab and FPGA/matlab代码/matlab/c9/encode_bit.m
Matlab and FPGA/matlab代码/matlab/c9/hamming7_4.m
Matlab and FPGA/matlab代码/matlab/c9/intrlvcode.m
Matlab and FPGA/matlab代码/matlab/c9/RScode.m
Matlab and FPGA/matlab代码/matlab/c9/rsc_encode.m
Matlab and FPGA/matlab代码/matlab/c9/TCMcode.m
Matlab and FPGA/Verilog代码/c10/10-2/mult.xco
Matlab and FPGA/Verilog代码/c10/10-2/mydds.xco
Matlab and FPGA/Verilog代码/c10/10-2/square_syn.v
Matlab and FPGA/Verilog代码/c10/10-4/coastas_dds.v
Matlab and FPGA/Verilog代码/c10/10-4/costas_lf.v
Matlab and FPGA/Verilog代码/c10/10-4/costas_loop.v
Matlab and FPGA/Verilog代码/c10/10-4/costas_lpf.v
Matlab and FPGA/Verilog代码/c10/10-4/costas_mult.v
Matlab and FPGA/Verilog代码/c10/10-4/err_mult.v
Matlab and FPGA/Verilog代码/c10/10-4/fir_lpf.xco
Matlab and FPGA/Verilog代码/c10/10-4/mult.xco
Matlab and FPGA/Verilog代码/c10/10-4/my_dds.xco
Matlab and FPGA/Verilog代码/c10/10-6/dearly_sub.v
Matlab and FPGA/Verilog代码/c10/10-6/dedds.v
Matlab and FPGA/Verilog代码/c10/10-6/delay_early_gate.v
Matlab and FPGA/Verilog代码/c10/10-6/de_mult.xco
Matlab and FPGA/Verilog代码/c10/10-6/eddds.xco
Matlab and FPGA/Verilog代码/c10/10-6/iir.v
Matlab and FPGA/Verilog代码/c10/10-6/iir1.v
Matlab and FPGA/Verilog代码/c10/10-8/baker.v
Matlab and FPGA/Verilog代码/c11/11-10/div16.xco
Matlab and FPGA/Verilog代码/c11/11-10/fir_rls.v
Matlab and FPGA/Verilog代码/c11/11-10/rlsmult.xco
Matlab and FPGA/Verilog代码/c11/11-10/shiftreg25.xco
Matlab and FPGA/Verilog代码/c11/11-10/shiftreg28.xco
Matlab and FPGA/Verilog代码/c11/11-10/shiftreg3.xco
Matlab and FPGA/Verilog代码/c11/11-12/dfe_filter.v
Matlab and FPGA/Verilog代码/c11/11-12/dfe_mult.xco
Matlab and FPGA/Verilog代码/c11/11-14/aa_adder.xco
Matlab and FPGA/Verilog代码/c11/11-14/aa_bram.xco
Matlab and FPGA/Verilog代码/c11/11-14/aa_cmult.xco
Matlab and FPGA/Verilog代码/c11/11-14/ad_a.v
Matlab and FPGA/Verilog代码/c11/11-14/shift16.xco
Matlab and FPGA/Verilog代码/c11/11-2/fir_lms.v
Matlab and FPGA/Verilog代码/c11/11-3/fir_pipline_lms.v
Matlab and FPGA/Verilog代码/c11/11-3/lmsmult.xco
Matlab and FPGA/Verilog代码/c11/11-5/mult.xco
Matlab and FPGA/Verilog代码/c11/11-5/shiftreg4.xco
Matlab and FPGA/Verilog代码/c11/11-5/sign_fir_lms.v
Matlab and FPGA/Verilog代码/c11/11-8/blockconnect.v
Matlab and FPGA/Verilog代码/c11/11-8/cmult.v
Matlab and FPGA/Verilog代码/c11/11-8/coe_updata.v
Matlab and FPGA/Verilog代码/c11/11-8/complex_mult.xco
Matlab and FPGA/Verilog代码/c11/11-8/fft_block.v
Matlab and FPGA/Verilog代码/c11/11-8/fft_block_lms.v
Matlab and FPGA/Verilog代码/c11/11-8/fft_w16_p32.xco
Matlab and FPGA/Verilog代码/c11/11-8/gonge.v
Matlab and FPGA/Verilog代码/c11/11-8/ifft_block.v
Matlab and FPGA/Verilog代码/c11/11-8/insert.v
Matlab and FPGA/Verilog代码/c11/11-8/save_sub.v
Matlab and FPGA/Verilog代码/c11/11-8/shiftreg.xco
Matlab and FPGA/Verilog代码/c11/11-8/shiftreg3.xco
Matlab and FPGA/Verilog代码/c11/11-8/shift_reg2.xco
Matlab and FPGA/Verilog代码/c11/11-8/srl16_w16_d16.xco
Matlab and FPGA/Verilog代码/c11/11-8/test_block_connect.v
Matlab and FPGA/Verilog代码/c12_0/12-6/rake_cmult.xco
Matlab and FPGA/Verilog代码/c12_0/12-6/rake_mrc.v
Matlab and FPGA/Verilog代码/c12_0/12-6/rake_shift4.xco
Matlab and FPGA/Ve

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