CDN加速镜像 | 设为首页 | 加入收藏夹
登陆 | 会员注册
当前位置： 首页 资源下载 源码下载 嵌入式/单片机编程 VHDL编程
收藏

文件名称:CD1_NIOS

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [MacOS] [C/C++] [源码]
  • 上传时间：
    2015-01-07
  • 文件大小：
    2.36mb
  • 已下载：
    0次
  • 提 供 者：
    叶****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
电信下载 联通下载
别用迅雷、360浏览器下载。
如迅雷强制弹出，可右键点击选“另存为”。
失败请重下，重下不扣分。
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

FPGA 的NIOS 入门程序，，可以用-FPGA NIOS introduction program, and can be used
(系统自动生成,下载前可以参看下载内容)

下载文件列表

CD1_NIOS/FPGA_CODE/.sopc_builder/filters.xml
CD1_NIOS/FPGA_CODE/.sopc_builder/install.ptf
CD1_NIOS/FPGA_CODE/.sopc_builder/install2.ptf
CD1_NIOS/FPGA_CODE/.sopc_builder/preferences.xml
CD1_NIOS/FPGA_CODE/CD1_NIOS.asm.rpt
CD1_NIOS/FPGA_CODE/CD1_NIOS.cdf
CD1_NIOS/FPGA_CODE/CD1_NIOS.csv
CD1_NIOS/FPGA_CODE/CD1_NIOS.done
CD1_NIOS/FPGA_CODE/CD1_NIOS.dpf
CD1_NIOS/FPGA_CODE/CD1_NIOS.fit.rpt
CD1_NIOS/FPGA_CODE/CD1_NIOS.fit.smsg
CD1_NIOS/FPGA_CODE/CD1_NIOS.fit.summary
CD1_NIOS/FPGA_CODE/CD1_NIOS.flow.rpt
CD1_NIOS/FPGA_CODE/CD1_NIOS.jdi
CD1_NIOS/FPGA_CODE/CD1_NIOS.map.rpt
CD1_NIOS/FPGA_CODE/CD1_NIOS.map.smsg
CD1_NIOS/FPGA_CODE/CD1_NIOS.map.summary
CD1_NIOS/FPGA_CODE/CD1_NIOS.pin
CD1_NIOS/FPGA_CODE/CD1_NIOS.pof
CD1_NIOS/FPGA_CODE/CD1_NIOS.qpf
CD1_NIOS/FPGA_CODE/CD1_NIOS.qsf
CD1_NIOS/FPGA_CODE/CD1_NIOS.sdc
CD1_NIOS/FPGA_CODE/CD1_NIOS.sof
CD1_NIOS/FPGA_CODE/CD1_NIOS.sta.rpt
CD1_NIOS/FPGA_CODE/CD1_NIOS.sta.summary
CD1_NIOS/FPGA_CODE/CD1_NIOS.tcl
CD1_NIOS/FPGA_CODE/CD1_NIOS.v
CD1_NIOS/FPGA_CODE/CD1_NIOS_PRE.csv
CD1_NIOS/FPGA_CODE/cpu_0.ocp
CD1_NIOS/FPGA_CODE/cpu_0.sdc
CD1_NIOS/FPGA_CODE/cpu_0.v
CD1_NIOS/FPGA_CODE/cpu_0_bht_ram.mif
CD1_NIOS/FPGA_CODE/cpu_0_dc_tag_ram.mif
CD1_NIOS/FPGA_CODE/cpu_0_ic_tag_ram.mif
CD1_NIOS/FPGA_CODE/cpu_0_jtag_debug_module_sysclk.v
CD1_NIOS/FPGA_CODE/cpu_0_jtag_debug_module_tck.v
CD1_NIOS/FPGA_CODE/cpu_0_jtag_debug_module_wrapper.v
CD1_NIOS/FPGA_CODE/cpu_0_mult_cell.v
CD1_NIOS/FPGA_CODE/cpu_0_ociram_default_contents.mif
CD1_NIOS/FPGA_CODE/cpu_0_oci_test_bench.v
CD1_NIOS/FPGA_CODE/cpu_0_rf_ram_a.mif
CD1_NIOS/FPGA_CODE/cpu_0_rf_ram_b.mif
CD1_NIOS/FPGA_CODE/cpu_0_test_bench.v
CD1_NIOS/FPGA_CODE/epcs_flash_controller_0.v
CD1_NIOS/FPGA_CODE/epcs_flash_controller_0_boot_rom.hex
CD1_NIOS/FPGA_CODE/greybox_tmp/cbx_args.txt
CD1_NIOS/FPGA_CODE/IP/DM9000A/DM9000A_IF_hw.tcl
CD1_NIOS/FPGA_CODE/IP/DM9000A/hdl/DM9000A_IF.v
CD1_NIOS/FPGA_CODE/IP/Image_RW/Image_RW.v
CD1_NIOS/FPGA_CODE/IP/Image_RW/Image_RW_hw.tcl
CD1_NIOS/FPGA_CODE/IP/Image_RW/Image_RW_hw.tclPreview
CD1_NIOS/FPGA_CODE/IP/Image_RW/Image_RW_hw.tcl~
CD1_NIOS/FPGA_CODE/IP/SRAM_16Bit_512K/hdl/SRAM_16Bit_512K.v
CD1_NIOS/FPGA_CODE/IP/SRAM_16Bit_512K/SRAM_16Bit_512K_hw.tcl
CD1_NIOS/FPGA_CODE/IP/TFT_SSD1963/TFT_SSD1963_IF.v
CD1_NIOS/FPGA_CODE/IP/TFT_SSD1963/TFT_SSD1963_IF_hw.tcl
CD1_NIOS/FPGA_CODE/IP/TFT_SSD1963/TFT_SSD1963_IF_hw.tcl~
CD1_NIOS/FPGA_CODE/jtag_uart_0.v
CD1_NIOS/FPGA_CODE/KEY.v
CD1_NIOS/FPGA_CODE/LED.v
CD1_NIOS/FPGA_CODE/nios.bsf
CD1_NIOS/FPGA_CODE/nios.html
CD1_NIOS/FPGA_CODE/nios.ptf
CD1_NIOS/FPGA_CODE/nios.ptf.8.0
CD1_NIOS/FPGA_CODE/nios.ptf.pre_generation_ptf
CD1_NIOS/FPGA_CODE/nios.qip
CD1_NIOS/FPGA_CODE/nios.sopc
CD1_NIOS/FPGA_CODE/nios.sopcinfo
CD1_NIOS/FPGA_CODE/nios.v
CD1_NIOS/FPGA_CODE/nios_clock_0.v
CD1_NIOS/FPGA_CODE/nios_clock_1.v
CD1_NIOS/FPGA_CODE/nios_generation_script
CD1_NIOS/FPGA_CODE/nios_inst.v
CD1_NIOS/FPGA_CODE/nios_log.txt
CD1_NIOS/FPGA_CODE/nios_sim/atail-f.pl
CD1_NIOS/FPGA_CODE/nios_sim/dummy_file
CD1_NIOS/FPGA_CODE/nios_sim/jtag_uart_0_input_mutex.dat
CD1_NIOS/FPGA_CODE/nios_sim/jtag_uart_0_input_stream.dat
CD1_NIOS/FPGA_CODE/nios_sim/jtag_uart_0_output_stream.dat
CD1_NIOS/FPGA_CODE/onchip_memory2_0.hex
CD1_NIOS/FPGA_CODE/onchip_memory2_0.v
CD1_NIOS/FPGA_CODE/output_file.jic
CD1_NIOS/FPGA_CODE/output_file.map
CD1_NIOS/FPGA_CODE/PLL100.ppf
CD1_NIOS/FPGA_CODE/PLL100.qip
CD1_NIOS/FPGA_CODE/PLL100.v
CD1_NIOS/FPGA_CODE/PLL166.ppf
CD1_NIOS/FPGA_CODE/PLL166.qip
CD1_NIOS/FPGA_CODE/PLL166.v
CD1_NIOS/FPGA_CODE/PLLJ_PLLSPE_INFO.txt
CD1_NIOS/FPGA_CODE/PLL_100.qip
CD1_NIOS/FPGA_CODE/sdram_0.v
CD1_NIOS/FPGA_CODE/sdram_1.v
CD1_NIOS/FPGA_CODE/sopc_add_qip_file.tcl
CD1_NIOS/FPGA_CODE/sopc_builder_log.txt
CD1_NIOS/FPGA_CODE/sram.v
CD1_NIOS/NIOS_CODE/.metadata/.lock
CD1_NIOS/NIOS_CODE/.metadata/.log
CD1_NIOS/NIOS_CODE/.metadata/.plugins/com.altera.nj.ui/dialog_settings.xml
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.core/.log
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.core/altera.components.1389414282575.pdom
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.core/CD1_TEST.1392884858275.pdom
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.core/CD1_TEST_syslib.1392884858044.pdom
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.core/onchip.1389414314604.pdom
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.core/onchip_syslib.1389414314381.pdom
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.core/SDRAM1.1403830703891.pdom
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.core/SDRAM1_syslib.1403830703715.pdom
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.make.core/.log
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.make.core/CD1_TEST.sc
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.make.core/CD1_TEST_syslib.sc
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.make.core/SDRAM1.sc
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.make.core/SDRAM1_syslib.sc
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.make.core/specs.c
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp
CD1_NIOS/NIOS_CODE/.metadata/.plugins/org.eclipse.cdt.make.ui/dialog_settings.

相关说明

  • 本站资源为会员上传分享交流与学习,如有侵犯您的权益,请联系我们删除.
  • 搜珍网是交换下载平台，只提供交流渠道，下载内容来自于网络，除下载问题外，其它问题请自行百度。更多...
  • 本站已设置防盗链，请勿用迅雷、QQ旋风等下载软件下载资源，下载后用WinRAR最新版进行解压.
  • 如果您发现内容无法下载，请稍后再次尝试；或换浏览器；或者到消费记录里找到下载记录反馈给我们.
  • 下载后发现下载的内容跟说明不相乎，请到消费记录里找到下载记录反馈给我们，经确认后退回积分.
  • 如下载前有疑问，可以通过点击"提供者"的名字，查看对方的联系方式，联系对方咨询.
查看所有评论

相关评论

暂无评论内容．

发表评论

*快速评论： 推荐 一般 有密码 和说明不符 不是源码或资料 文件不全 不能解压 纯粹是垃圾
*内　　容：
*验 证 码：
搜珍网 www.dssz.com

浏览历史记录

关闭