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文件名称:lab28

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  • 上传时间:
    2015-01-13
  • 文件大小:
    1.33mb
  • 已下载:
    2次
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    别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容来自于网络,使用问题请自行百度

采用5级流水线MIPS微处理器设计,实现32位流水线的算数、逻辑、以为等指令-pipeline MIPS
(系统自动生成,下载前可以参看下载内容)

下载文件列表

lab28/
lab28/lab28/
lab28/lab28/lab28说明.ppt
lab28/lab28/PipelineCPU/
lab28/lab28/PipelineCPU/ISE/
lab28/lab28/PipelineCPU/ISE/MipsPipelineCPU.ise
lab28/lab28/PipelineCPU/ISE/MipsPipelineCPU.ise_ISE_Backup
lab28/lab28/PipelineCPU/ISE/MipsPipelineCPU.restore
lab28/lab28/PipelineCPU/ISE/MipsPipelineCPU_summary.html
lab28/lab28/PipelineCPU/ISE/_xmsgs/
lab28/lab28/PipelineCPU/SIM/
lab28/lab28/PipelineCPU/SIM/ALU/
lab28/lab28/PipelineCPU/SIM/ALU/ALU.cr.mti
lab28/lab28/PipelineCPU/SIM/ALU/ALU.mpf
lab28/lab28/PipelineCPU/SIM/ALU/ALU_tb.v
lab28/lab28/PipelineCPU/SIM/ALU/Snap6.bmp
lab28/lab28/PipelineCPU/SIM/ALU/vsim.wlf
lab28/lab28/PipelineCPU/SIM/ALU/work/
lab28/lab28/PipelineCPU/SIM/ALU/work/@a@l@u/
lab28/lab28/PipelineCPU/SIM/ALU/work/@a@l@u/_primary.dat
lab28/lab28/PipelineCPU/SIM/ALU/work/@a@l@u/_primary.dbs
lab28/lab28/PipelineCPU/SIM/ALU/work/@a@l@u/_primary.vhd
lab28/lab28/PipelineCPU/SIM/ALU/work/@a@l@u_tb_v/
lab28/lab28/PipelineCPU/SIM/ALU/work/@a@l@u_tb_v/_primary.dat
lab28/lab28/PipelineCPU/SIM/ALU/work/@a@l@u_tb_v/_primary.dbs
lab28/lab28/PipelineCPU/SIM/ALU/work/@a@l@u_tb_v/_primary.vhd
lab28/lab28/PipelineCPU/SIM/ALU/work/@data@r@a@m/
lab28/lab28/PipelineCPU/SIM/ALU/work/@data@r@a@m/_primary.dat
lab28/lab28/PipelineCPU/SIM/ALU/work/@data@r@a@m/_primary.dbs
lab28/lab28/PipelineCPU/SIM/ALU/work/@data@r@a@m/_primary.vhd
lab28/lab28/PipelineCPU/SIM/ALU/work/@decode/
lab28/lab28/PipelineCPU/SIM/ALU/work/@decode/_primary.dat
lab28/lab28/PipelineCPU/SIM/ALU/work/@decode/_primary.dbs
lab28/lab28/PipelineCPU/SIM/ALU/work/@decode/_primary.vhd
lab28/lab28/PipelineCPU/SIM/ALU/work/@e@x/
lab28/lab28/PipelineCPU/SIM/ALU/work/@e@x/_primary.dat
lab28/lab28/PipelineCPU/SIM/ALU/work/@e@x/_primary.dbs
lab28/lab28/PipelineCPU/SIM/ALU/work/@e@x/_primary.vhd
lab28/lab28/PipelineCPU/SIM/ALU/work/@i@d/
lab28/lab28/PipelineCPU/SIM/ALU/work/@i@d/_primary.dat
lab28/lab28/PipelineCPU/SIM/ALU/work/@i@d/_primary.dbs
lab28/lab28/PipelineCPU/SIM/ALU/work/@i@d/_primary.vhd
lab28/lab28/PipelineCPU/SIM/ALU/work/@i@f/
lab28/lab28/PipelineCPU/SIM/ALU/work/@i@f/_primary.dat
lab28/lab28/PipelineCPU/SIM/ALU/work/@i@f/_primary.dbs
lab28/lab28/PipelineCPU/SIM/ALU/work/@i@f/_primary.vhd
lab28/lab28/PipelineCPU/SIM/ALU/work/@instruction@r@o@m/
lab28/lab28/PipelineCPU/SIM/ALU/work/@instruction@r@o@m/_primary.dat
lab28/lab28/PipelineCPU/SIM/ALU/work/@instruction@r@o@m/_primary.dbs
lab28/lab28/PipelineCPU/SIM/ALU/work/@instruction@r@o@m/_primary.vhd
lab28/lab28/PipelineCPU/SIM/ALU/work/@mips@pipeline@c@p@u/
lab28/lab28/PipelineCPU/SIM/ALU/work/@mips@pipeline@c@p@u/_primary.dat
lab28/lab28/PipelineCPU/SIM/ALU/work/@mips@pipeline@c@p@u/_primary.dbs
lab28/lab28/PipelineCPU/SIM/ALU/work/@mips@pipeline@c@p@u/_primary.vhd
lab28/lab28/PipelineCPU/SIM/ALU/work/@multi@registers/
lab28/lab28/PipelineCPU/SIM/ALU/work/@multi@registers/_primary.dat
lab28/lab28/PipelineCPU/SIM/ALU/work/@multi@registers/_primary.dbs
lab28/lab28/PipelineCPU/SIM/ALU/work/@multi@registers/_primary.vhd
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/vopt0b4g51
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/vopt0xkmjw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/vopt1enriw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/vopt1zqvhw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/vopt3vsd51
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/vopt4daijw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/vopt4ybmiw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/vopt5fdqhw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/vopt7bfa51
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/vopt7cyckw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/vopt8e1hiw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/vopt8xzfjw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/vopt8z2khw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptbdmbjw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptbwj9kw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptcfrhhw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptcyneiw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptec96kw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptfecbiw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptfxa8jw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptfzddhw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptid05jw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptiwy2kw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptjf3ahw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptjy18iw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptmt3t51
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptnckzjw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptnxm2jw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptnyi42y
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptqzr7hw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptsasq51
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptsw9wjw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/vopttdbyiw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptwtej51
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptxczsjw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptxx0viw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/voptye2yhw
lab28/lab28/PipelineCPU/SIM/ALU/work/@_opt/_deps
lab28/lab28/PipelineCPU/SIM/ALU/work/adder_32bit

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