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文件名称:adder_32bits
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- 上传时间:2015-05-30
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文件大小:211kb
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采用“进位选择加法”技术设计32位加法器 Verilog语言编写-32 bit adder
(系统自动生成,下载前可以参看下载内容)
下载文件列表
adder_32bits/
adder_32bits/sim/
adder_32bits/sim/32adder.cr.mti
adder_32bits/sim/32adder.mpf
adder_32bits/sim/add_ahead.v.bak
adder_32bits/sim/adder_32bits.v.bak
adder_32bits/sim/transcript
adder_32bits/sim/vsim.wlf
adder_32bits/sim/work/
adder_32bits/sim/work/_info
adder_32bits/sim/work/add_ahead/
adder_32bits/sim/work/add_ahead/_primary.dat
adder_32bits/sim/work/add_ahead/_primary.vhd
adder_32bits/sim/work/add_ahead/verilog.asm
adder_32bits/sim/work/adder_32bits/
adder_32bits/sim/work/adder_32bits/_primary.dat
adder_32bits/sim/work/adder_32bits/_primary.vhd
adder_32bits/sim/work/adder_32bits/verilog.asm
adder_32bits/sim/work/adder_32bits_tb/
adder_32bits/sim/work/adder_32bits_tb/_primary.dat
adder_32bits/sim/work/adder_32bits_tb/_primary.vhd
adder_32bits/sim/work/adder_32bits_tb/verilog.asm
adder_32bits/sim/work/mux/
adder_32bits/sim/work/mux/_primary.dat
adder_32bits/sim/work/mux/_primary.vhd
adder_32bits/sim/work/mux/verilog.asm
adder_32bits/src/
adder_32bits/src/add_ahead.v
adder_32bits/src/adder_32bits.v
adder_32bits/src/adder_32bits_tb.v
adder_32bits/src/mux.v
adder_32bits/实验7 快速加法器的设计和应用.docx
adder_32bits/sim/
adder_32bits/sim/32adder.cr.mti
adder_32bits/sim/32adder.mpf
adder_32bits/sim/add_ahead.v.bak
adder_32bits/sim/adder_32bits.v.bak
adder_32bits/sim/transcript
adder_32bits/sim/vsim.wlf
adder_32bits/sim/work/
adder_32bits/sim/work/_info
adder_32bits/sim/work/add_ahead/
adder_32bits/sim/work/add_ahead/_primary.dat
adder_32bits/sim/work/add_ahead/_primary.vhd
adder_32bits/sim/work/add_ahead/verilog.asm
adder_32bits/sim/work/adder_32bits/
adder_32bits/sim/work/adder_32bits/_primary.dat
adder_32bits/sim/work/adder_32bits/_primary.vhd
adder_32bits/sim/work/adder_32bits/verilog.asm
adder_32bits/sim/work/adder_32bits_tb/
adder_32bits/sim/work/adder_32bits_tb/_primary.dat
adder_32bits/sim/work/adder_32bits_tb/_primary.vhd
adder_32bits/sim/work/adder_32bits_tb/verilog.asm
adder_32bits/sim/work/mux/
adder_32bits/sim/work/mux/_primary.dat
adder_32bits/sim/work/mux/_primary.vhd
adder_32bits/sim/work/mux/verilog.asm
adder_32bits/src/
adder_32bits/src/add_ahead.v
adder_32bits/src/adder_32bits.v
adder_32bits/src/adder_32bits_tb.v
adder_32bits/src/mux.v
adder_32bits/实验7 快速加法器的设计和应用.docx
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