文件名称:plj.FPGA
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- 上传时间：2015-06-14
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文件大小：8.85mb
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本频率计基于CPLD/FPGA实现。 50MHZ标准频率为CPLD内部时钟信号，被测方波为信号发生器产生的方波信号，显示电路由TTL芯片及七段数码管组成的电路，自校正输出由CPLD输出已知频率的测试方波信号，可将其输入至测试端口，进行系统精度校正。 -The frequency meter based on CPLD/FPGA implementation. 50MHZ standard CPLD internal clock signal frequency, square-wave test signal is a square wave signal generator, the display circuit circuit TTL chip and composed of seven segments, self-correction output the CPLD output a known frequency square wave test signals can be input to the test port for system accuracy correction.
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下载文件列表
plj上FPGA板终结版/
plj上FPGA板终结版/.Xil-PlanAhead-1260-WIN7U-20130804N/
plj上FPGA板终结版/.Xil-PlanAhead-1260-WIN7U-20130804N/ngc2edif/
plj上FPGA板终结版/.Xil-PlanAhead-1260-WIN7U-20130804N/ngc2edif/ngc2edif.log
plj上FPGA板终结版/.Xil-PlanAhead-1260-WIN7U-20130804N/ngc2edif/plj.edif
plj上FPGA板终结版/.Xil-PlanAhead-1260-WIN7U-20130804N/ngc2edif/_xmsgs/
plj上FPGA板终结版/.Xil-PlanAhead-1260-WIN7U-20130804N/ngc2edif/_xmsgs/ngc2edif.xmsgs
plj上FPGA板终结版/.Xil-PlanAhead-6748-WIN7U-20130804N/
plj上FPGA板终结版/.Xil-PlanAhead-6748-WIN7U-20130804N/ngc2edif/
plj上FPGA板终结版/.Xil-PlanAhead-6748-WIN7U-20130804N/ngc2edif/ngc2edif.log
plj上FPGA板终结版/.Xil-PlanAhead-6748-WIN7U-20130804N/ngc2edif/plj.edif
plj上FPGA板终结版/.Xil-PlanAhead-6748-WIN7U-20130804N/ngc2edif/_xmsgs/
plj上FPGA板终结版/.Xil-PlanAhead-6748-WIN7U-20130804N/ngc2edif/_xmsgs/ngc2edif.xmsgs
plj上FPGA板终结版/.Xil-PlanAhead-8008-WIN7U-20130804N/
plj上FPGA板终结版/.Xil-PlanAhead-8008-WIN7U-20130804N/ngc2edif/
plj上FPGA板终结版/.Xil-PlanAhead-8008-WIN7U-20130804N/ngc2edif/ngc2edif.log
plj上FPGA板终结版/.Xil-PlanAhead-8008-WIN7U-20130804N/ngc2edif/plj.edif
plj上FPGA板终结版/.Xil-PlanAhead-8008-WIN7U-20130804N/ngc2edif/_xmsgs/
plj上FPGA板终结版/.Xil-PlanAhead-8008-WIN7U-20130804N/ngc2edif/_xmsgs/ngc2edif.xmsgs
plj上FPGA板终结版/chuancan.v
plj上FPGA板终结版/display.v
plj上FPGA板终结版/fenpinqi1.cmd_log
plj上FPGA板终结版/fenpinqi1.tfi
plj上FPGA板终结版/fenpinqi1.v
plj上FPGA板终结版/fenpinqi1_isim_beh.exe
plj上FPGA板终结版/fenpinqi1_stx_beh.prj
plj上FPGA板终结版/fenpinqi2.v
plj上FPGA板终结版/fenpinqi2_isim_beh.exe
plj上FPGA板终结版/fenpinqi2_stx_beh.prj
plj上FPGA板终结版/fenpinqi3.v
plj上FPGA板终结版/fenpinqi4.v
plj上FPGA板终结版/Freq_div1.v
plj上FPGA板终结版/fuse.log
plj上FPGA板终结版/fuse.xmsgs
plj上FPGA板终结版/fuseRelaunch.cmd
plj上FPGA板终结版/gg.wcfg
plj上FPGA板终结版/ipcore_dir/
plj上FPGA板终结版/iseconfig/
plj上FPGA板终结版/iseconfig/plj.projectmgr
plj上FPGA板终结版/iseconfig/plj.xreport
plj上FPGA板终结版/isim/
plj上FPGA板终结版/isim.cmd
plj上FPGA板终结版/isim.log
plj上FPGA板终结版/isim/isim_usage_statistics.html
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/isimcrash.log
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/isimkernel.log
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/netId.dat
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/pianxuan_isim_beh.exe
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/tmp_save/
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/tmp_save/_1
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/m_00000000001646468355_2926355121.c
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/m_00000000001646468355_2926355121.didat
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/m_00000000001646468355_2926355121.nt.obj
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.c
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.didat
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.nt.obj
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/pianxuan_isim_beh.exe_main.c
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/pianxuan_isim_beh.exe_main.nt.obj
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/isimcrash.log
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/isimkernel.log
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/netId.dat
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/plj_isim_beh.exe
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/tmp_save/
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/tmp_save/_1
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000029304428_1411027795.c
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000029304428_1411027795.didat
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000029304428_1411027795.nt.obj
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000399059605_1142516195.c
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000399059605_1142516195.didat
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000399059605_1142516195.nt.obj
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000893474381_2910506198.c
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000893474381_2910506198.didat
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000893474381_2910506198.nt.obj
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000001646468355_2926355121.c
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000001646468355_2926355121.didat
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000001646468355_2926355121.nt.obj
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000002009139276_3665689664.c
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000002009139276_3665689664.didat
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000002009139276_3665689664.nt.obj
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000002101667957_0848853732.c
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000002101667957_0848853732.didat
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000002101667957_0848853732.nt.obj
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_000000000036446
plj上FPGA板终结版/.Xil-PlanAhead-1260-WIN7U-20130804N/
plj上FPGA板终结版/.Xil-PlanAhead-1260-WIN7U-20130804N/ngc2edif/
plj上FPGA板终结版/.Xil-PlanAhead-1260-WIN7U-20130804N/ngc2edif/ngc2edif.log
plj上FPGA板终结版/.Xil-PlanAhead-1260-WIN7U-20130804N/ngc2edif/plj.edif
plj上FPGA板终结版/.Xil-PlanAhead-1260-WIN7U-20130804N/ngc2edif/_xmsgs/
plj上FPGA板终结版/.Xil-PlanAhead-1260-WIN7U-20130804N/ngc2edif/_xmsgs/ngc2edif.xmsgs
plj上FPGA板终结版/.Xil-PlanAhead-6748-WIN7U-20130804N/
plj上FPGA板终结版/.Xil-PlanAhead-6748-WIN7U-20130804N/ngc2edif/
plj上FPGA板终结版/.Xil-PlanAhead-6748-WIN7U-20130804N/ngc2edif/ngc2edif.log
plj上FPGA板终结版/.Xil-PlanAhead-6748-WIN7U-20130804N/ngc2edif/plj.edif
plj上FPGA板终结版/.Xil-PlanAhead-6748-WIN7U-20130804N/ngc2edif/_xmsgs/
plj上FPGA板终结版/.Xil-PlanAhead-6748-WIN7U-20130804N/ngc2edif/_xmsgs/ngc2edif.xmsgs
plj上FPGA板终结版/.Xil-PlanAhead-8008-WIN7U-20130804N/
plj上FPGA板终结版/.Xil-PlanAhead-8008-WIN7U-20130804N/ngc2edif/
plj上FPGA板终结版/.Xil-PlanAhead-8008-WIN7U-20130804N/ngc2edif/ngc2edif.log
plj上FPGA板终结版/.Xil-PlanAhead-8008-WIN7U-20130804N/ngc2edif/plj.edif
plj上FPGA板终结版/.Xil-PlanAhead-8008-WIN7U-20130804N/ngc2edif/_xmsgs/
plj上FPGA板终结版/.Xil-PlanAhead-8008-WIN7U-20130804N/ngc2edif/_xmsgs/ngc2edif.xmsgs
plj上FPGA板终结版/chuancan.v
plj上FPGA板终结版/display.v
plj上FPGA板终结版/fenpinqi1.cmd_log
plj上FPGA板终结版/fenpinqi1.tfi
plj上FPGA板终结版/fenpinqi1.v
plj上FPGA板终结版/fenpinqi1_isim_beh.exe
plj上FPGA板终结版/fenpinqi1_stx_beh.prj
plj上FPGA板终结版/fenpinqi2.v
plj上FPGA板终结版/fenpinqi2_isim_beh.exe
plj上FPGA板终结版/fenpinqi2_stx_beh.prj
plj上FPGA板终结版/fenpinqi3.v
plj上FPGA板终结版/fenpinqi4.v
plj上FPGA板终结版/Freq_div1.v
plj上FPGA板终结版/fuse.log
plj上FPGA板终结版/fuse.xmsgs
plj上FPGA板终结版/fuseRelaunch.cmd
plj上FPGA板终结版/gg.wcfg
plj上FPGA板终结版/ipcore_dir/
plj上FPGA板终结版/iseconfig/
plj上FPGA板终结版/iseconfig/plj.projectmgr
plj上FPGA板终结版/iseconfig/plj.xreport
plj上FPGA板终结版/isim/
plj上FPGA板终结版/isim.cmd
plj上FPGA板终结版/isim.log
plj上FPGA板终结版/isim/isim_usage_statistics.html
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/isimcrash.log
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/isimkernel.log
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/netId.dat
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/pianxuan_isim_beh.exe
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/tmp_save/
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/tmp_save/_1
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/m_00000000001646468355_2926355121.c
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/m_00000000001646468355_2926355121.didat
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/m_00000000001646468355_2926355121.nt.obj
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.c
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.didat
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.nt.obj
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/pianxuan_isim_beh.exe_main.c
plj上FPGA板终结版/isim/pianxuan_isim_beh.exe.sim/work/pianxuan_isim_beh.exe_main.nt.obj
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/isimcrash.log
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/isimkernel.log
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/netId.dat
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/plj_isim_beh.exe
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/tmp_save/
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/tmp_save/_1
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000029304428_1411027795.c
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000029304428_1411027795.didat
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000029304428_1411027795.nt.obj
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000399059605_1142516195.c
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000399059605_1142516195.didat
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000399059605_1142516195.nt.obj
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000893474381_2910506198.c
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000893474381_2910506198.didat
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000000893474381_2910506198.nt.obj
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000001646468355_2926355121.c
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000001646468355_2926355121.didat
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000001646468355_2926355121.nt.obj
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000002009139276_3665689664.c
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000002009139276_3665689664.didat
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000002009139276_3665689664.nt.obj
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000002101667957_0848853732.c
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000002101667957_0848853732.didat
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_00000000002101667957_0848853732.nt.obj
plj上FPGA板终结版/isim/plj_isim_beh.exe.sim/work/m_000000000036446
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