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文件名称:FPGA_HW_FOR_FTT

  • 所属分类：
    Other systems
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2015-09-23
  • 文件大小：
    12.87mb
  • 已下载：
    1次
  • 提 供 者：
    t*****
  • 相关连接：
    无
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介绍说明－－下载内容来自于网络，使用问题请自行百度

Chirp信号数字下变频的Matlab和ISE+Modelsim交互仿真-Interactive simulation of Matlab and ISE+Modelsim in Chirp signal digital down converter


(系统自动生成,下载前可以参看下载内容)

下载文件列表

FPGA_HW_FOR_FTT/
FPGA_HW_FOR_FTT/实验1/
FPGA_HW_FOR_FTT/实验1/1.PNG
FPGA_HW_FOR_FTT/实验1/2.PNG
FPGA_HW_FOR_FTT/实验1/Course_Exer/
FPGA_HW_FOR_FTT/实验1/Course_Exer/.Xil-PlanAhead-2180-YL-201504151422/
FPGA_HW_FOR_FTT/实验1/Course_Exer/.Xil-PlanAhead-2180-YL-201504151422/ngc2edif/
FPGA_HW_FOR_FTT/实验1/Course_Exer/.Xil-PlanAhead-2180-YL-201504151422/ngc2edif/ngc2edif.log
FPGA_HW_FOR_FTT/实验1/Course_Exer/.Xil-PlanAhead-2180-YL-201504151422/ngc2edif/Second_Timer.edif
FPGA_HW_FOR_FTT/实验1/Course_Exer/.Xil-PlanAhead-2180-YL-201504151422/ngc2edif/_xmsgs/
FPGA_HW_FOR_FTT/实验1/Course_Exer/.Xil-PlanAhead-2180-YL-201504151422/ngc2edif/_xmsgs/ngc2edif.xmsgs
FPGA_HW_FOR_FTT/实验1/Course_Exer/Course_Exer.gise
FPGA_HW_FOR_FTT/实验1/Course_Exer/Course_Exer.xise
FPGA_HW_FOR_FTT/实验1/Course_Exer/Fre_Div.cmd_log
FPGA_HW_FOR_FTT/实验1/Course_Exer/Fre_Div.tfi
FPGA_HW_FOR_FTT/实验1/Course_Exer/Fre_Div.v
FPGA_HW_FOR_FTT/实验1/Course_Exer/ipcore_dir/
FPGA_HW_FOR_FTT/实验1/Course_Exer/iseconfig/
FPGA_HW_FOR_FTT/实验1/Course_Exer/iseconfig/Second_Timer.xreport
FPGA_HW_FOR_FTT/实验1/Course_Exer/modelsim.ini
FPGA_HW_FOR_FTT/实验1/Course_Exer/pa.fromNcd.tcl
FPGA_HW_FOR_FTT/实验1/Course_Exer/par_usage_statistics.html
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead.ngc2edif.log
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead_run_1/
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead_run_1/Course_Exer.data/
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead_run_1/Course_Exer.data/cache/
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead_run_1/Course_Exer.data/cache/Second_Timer_ngc_dc92af04.edif
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead_run_1/Course_Exer.data/constrs_1/
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead_run_1/Course_Exer.data/constrs_1/fileset.xml
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead_run_1/Course_Exer.data/runs/
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead_run_1/Course_Exer.data/runs/impl_1.psg
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead_run_1/Course_Exer.data/runs/runs.xml
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead_run_1/Course_Exer.data/sources_1/
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead_run_1/Course_Exer.data/sources_1/fileset.xml
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead_run_1/Course_Exer.ppr
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead_run_1/planAhead.jou
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead_run_1/planAhead.log
FPGA_HW_FOR_FTT/实验1/Course_Exer/planAhead_run_1/planAhead_run.log
FPGA_HW_FOR_FTT/实验1/Course_Exer/second_timer.bgn
FPGA_HW_FOR_FTT/实验1/Course_Exer/second_timer.bit
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.bld
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.cmd_log
FPGA_HW_FOR_FTT/实验1/Course_Exer/second_timer.drc
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.lso
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.ncd
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.ngc
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.ngd
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.ngr
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.pad
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.par
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.pcf
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.prj
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.ptwx
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.stx
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.syr
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.twr
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.twx
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.ucf
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.unroutes
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.ut
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.v
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.xdl
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.xpi
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer.xst
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_bitgen.xwbt
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_envsettings.html
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_guide.ncd
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_map.map
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_map.mrp
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_map.ncd
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_map.ngm
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_map.xrpt
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_map_fpga_editor.log
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_map_mrp.html
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_ngdbuild.xrpt
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_pad.csv
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_pad.txt
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_par.xrpt
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_summary.html
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_summary.xml
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_usage.xml
FPGA_HW_FOR_FTT/实验1/Course_Exer/Second_Timer_xst.xrpt
FPGA_HW_FOR_FTT/实验1/Course_Exer/Timer_Test.fdo
FPGA_HW_FOR_FTT/实验1/Course_Exer/Timer_Test.udo
FPGA_HW_FOR_FTT/实验1/Course_Exer/Timer_Test.v
FPGA_HW_FOR_FTT/实验1/Course_Exer/Timer_Test_wave.fdo
FPGA_HW_FOR_FTT/实验1/Course_Exer/transcript
FPGA_HW_FOR_FTT/实验1/Course_Exer/usage_statistics_webtalk.html
FPGA_HW_FOR_FTT/实验1/Course_Exer/vsim.wlf
FPGA_HW_FOR_FTT/实验1/Course_Exer/webtalk.log
FPGA_HW_FOR_FTT/实验1/Course_Exer/webtalk_pn.xml
FPGA_HW_FOR_FTT/实验1/Course_Exer/work/
FPGA_HW_FOR_FTT/实验1/Course_Exer/work/@fre

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