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文件名称:FPGA_SPI_recive_display

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
  • 上传时间：
    2016-04-19
  • 文件大小：
    9.02mb
  • 已下载：
    0次
  • 提 供 者：
    毕****
  • 相关连接：
    无
  • 下载说明：
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修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

FPGA 接收主发端SPI接口发来的数据，解调并用FPGA板上的数码管显示。 SPI发送端程序见STM32F407版SPI发送.rar-FPGA receives the master SPI　interface data , demodulation and display on digital LED digital displays . Master SPI sending program　see　STM32F407 version SPI send.Rar
(系统自动生成,下载前可以参看下载内容)

下载文件列表

FPGA_number_display/db/add_sub_7pc.tdf
FPGA_number_display/db/add_sub_8pc.tdf
FPGA_number_display/db/altsyncram_0u14.tdf
FPGA_number_display/db/altsyncram_4124.tdf
FPGA_number_display/db/altsyncram_4r14.tdf
FPGA_number_display/db/altsyncram_4u14.tdf
FPGA_number_display/db/altsyncram_6r14.tdf
FPGA_number_display/db/altsyncram_a124.tdf
FPGA_number_display/db/altsyncram_ar14.tdf
FPGA_number_display/db/altsyncram_c124.tdf
FPGA_number_display/db/altsyncram_e124.tdf
FPGA_number_display/db/altsyncram_o024.tdf
FPGA_number_display/db/altsyncram_s024.tdf
FPGA_number_display/db/altsyncram_st14.tdf
FPGA_number_display/db/altsyncram_u024.tdf
FPGA_number_display/db/alt_u_div_a4f.tdf
FPGA_number_display/db/cmpr_ngc.tdf
FPGA_number_display/db/cmpr_ogc.tdf
FPGA_number_display/db/cmpr_qgc.tdf
FPGA_number_display/db/cmpr_rgc.tdf
FPGA_number_display/db/cntr_05j.tdf
FPGA_number_display/db/cntr_23j.tdf
FPGA_number_display/db/cntr_9gi.tdf
FPGA_number_display/db/cntr_agi.tdf
FPGA_number_display/db/cntr_cgi.tdf
FPGA_number_display/db/cntr_dgi.tdf
FPGA_number_display/db/cntr_egi.tdf
FPGA_number_display/db/cntr_fgi.tdf
FPGA_number_display/db/cntr_g9j.tdf
FPGA_number_display/db/cntr_gbj.tdf
FPGA_number_display/db/cntr_h6j.tdf
FPGA_number_display/db/cntr_hgi.tdf
FPGA_number_display/db/cntr_i6j.tdf
FPGA_number_display/db/cntr_igi.tdf
FPGA_number_display/db/cntr_jgi.tdf
FPGA_number_display/db/cntr_o9j.tdf
FPGA_number_display/db/cntr_pei.tdf
FPGA_number_display/db/decode_dvf.tdf
FPGA_number_display/db/decode_msa.tdf
FPGA_number_display/db/logic_util_heursitic.dat
FPGA_number_display/db/lpm_divide_jhm.tdf
FPGA_number_display/db/lpm_divide_m9m.tdf
FPGA_number_display/db/mux_0tc.tdf
FPGA_number_display/db/mux_1nb.tdf
FPGA_number_display/db/mux_qsc.tdf
FPGA_number_display/db/mux_rsc.tdf
FPGA_number_display/db/mux_ssc.tdf
FPGA_number_display/db/mux_tsc.tdf
FPGA_number_display/db/mux_vsc.tdf
FPGA_number_display/db/number_mod.(0).cnf.cdb
FPGA_number_display/db/number_mod.(0).cnf.hdb
FPGA_number_display/db/number_mod.(1).cnf.cdb
FPGA_number_display/db/number_mod.(1).cnf.hdb
FPGA_number_display/db/number_mod.(10).cnf.cdb
FPGA_number_display/db/number_mod.(10).cnf.hdb
FPGA_number_display/db/number_mod.(100).cnf.cdb
FPGA_number_display/db/number_mod.(100).cnf.hdb
FPGA_number_display/db/number_mod.(101).cnf.cdb
FPGA_number_display/db/number_mod.(101).cnf.hdb
FPGA_number_display/db/number_mod.(102).cnf.cdb
FPGA_number_display/db/number_mod.(102).cnf.hdb
FPGA_number_display/db/number_mod.(103).cnf.cdb
FPGA_number_display/db/number_mod.(103).cnf.hdb
FPGA_number_display/db/number_mod.(104).cnf.cdb
FPGA_number_display/db/number_mod.(104).cnf.hdb
FPGA_number_display/db/number_mod.(105).cnf.cdb
FPGA_number_display/db/number_mod.(105).cnf.hdb
FPGA_number_display/db/number_mod.(106).cnf.cdb
FPGA_number_display/db/number_mod.(106).cnf.hdb
FPGA_number_display/db/number_mod.(107).cnf.cdb
FPGA_number_display/db/number_mod.(107).cnf.hdb
FPGA_number_display/db/number_mod.(108).cnf.cdb
FPGA_number_display/db/number_mod.(108).cnf.hdb
FPGA_number_display/db/number_mod.(109).cnf.cdb
FPGA_number_display/db/number_mod.(109).cnf.hdb
FPGA_number_display/db/number_mod.(11).cnf.cdb
FPGA_number_display/db/number_mod.(11).cnf.hdb
FPGA_number_display/db/number_mod.(110).cnf.cdb
FPGA_number_display/db/number_mod.(110).cnf.hdb
FPGA_number_display/db/number_mod.(111).cnf.cdb
FPGA_number_display/db/number_mod.(111).cnf.hdb
FPGA_number_display/db/number_mod.(112).cnf.cdb
FPGA_number_display/db/number_mod.(112).cnf.hdb
FPGA_number_display/db/number_mod.(113).cnf.cdb
FPGA_number_display/db/number_mod.(113).cnf.hdb
FPGA_number_display/db/number_mod.(114).cnf.cdb
FPGA_number_display/db/number_mod.(114).cnf.hdb
FPGA_number_display/db/number_mod.(115).cnf.cdb
FPGA_number_display/db/number_mod.(115).cnf.hdb
FPGA_number_display/db/number_mod.(116).cnf.cdb
FPGA_number_display/db/number_mod.(116).cnf.hdb
FPGA_number_display/db/number_mod.(117).cnf.cdb
FPGA_number_display/db/number_mod.(117).cnf.hdb
FPGA_number_display/db/number_mod.(118).cnf.cdb
FPGA_number_display/db/number_mod.(118).cnf.hdb
FPGA_number_display/db/number_mod.(119).cnf.cdb
FPGA_number_display/db/number_mod.(119).cnf.hdb
FPGA_number_display/db/number_mod.(12).cnf.cdb
FPGA_number_display/db/number_mod.(12).cnf.hdb
FPGA_number_display/db/number_mod.(120).cnf.cdb
FPGA_number_display/db/number_mod.(120).cnf.hdb
FPGA_number_display/db/number_mod.(121).cnf.cdb
FPGA_number_display/db/number_mod.(121).cnf.hdb
FPGA_number_display/db/number_mod.(122).cnf.cdb
FPGA_number_display/db/number_mod.(122).cnf.hdb
FPGA_number_display/db/number_mod.(123).cnf.cdb
FPGA_number_display/db/number_mod.(123).cnf.hdb
FPGA_number_display/db/number_mod.(124).cnf.cdb
FPGA_number_display/db/number_mod.(124).cnf.hdb
FPGA_number_display/db/number_mod.(125).cnf.cdb
FPGA_number_display/db/number_mod.(125).cnf.hdb
FPGA_number_display/db/number_mod.(126).cnf.cdb
FPGA_number_display/db/number_mod.(126).cnf.hdb
FPGA_number_display/db/number_mod.(127).cnf.cdb
FPGA_number_display/db/number_mod.(127).cnf.hdb
FPGA_number_display/db/number_mod.(128).cnf.cdb
FPGA_number_display/db/number_m

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