- swc-1.5.20 数飞OA助手
- VBCodePrint vb 打印代码 可以正常打印 的不错 不错爱
- JokeBook A simple program in VB.net to explain begginer how to use access and VB. This program is a simple Jokebook app with the database(empty). Features: Random datasets Search for a data Moving one dataset ahead or back.
- myVAD This another source code for speech recognition.. this is the voice active detection using energy detection
- CSharpMSMQDemo 这份文档是一个用C#写的操作MSMQ的例子
- Applied Cryptography - Bruce Schneier Bruce Schneier\Applied Cryptography (527)
文件名称:SDRAM-and-FIFO-for-DE1-SoC-master
介绍说明－－下载内容来自于网络，使用问题请自行百度
Verilog TUTORIAL for beginners. We had earlier published a Verilog tutorial that made use of the Xilinx ISE Simulator.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
SDRAM-and-FIFO-for-DE1-SoC-master
.................................\.gitattributes
.................................\.gitignore
.................................\SDRAM
.................................\.....\.qsys_edit
.................................\.....\..........\RAMSYS.xml
.................................\.....\..........\filters.xml
.................................\.....\..........\preferences.xml
.................................\.....\..........\sdram.xml
.................................\.....\PLLJ_PLLSPE_INFO.txt
.................................\.....\RAM.vhd
.................................\.....\RAMSYS.qsys
.................................\.....\RAMSYS.sopcinfo
.................................\.....\RAMSYS
.................................\.....\......\RAMSYS.bsf
.................................\.....\......\RAMSYS.cmp
.................................\.....\......\RAMSYS.html
.................................\.....\......\RAMSYS.xml
.................................\.....\......\RAMSYS_bb.v
.................................\.....\......\RAMSYS_generation.rpt
.................................\.....\......\RAMSYS_generation_previous.rpt
.................................\.....\......\RAMSYS_inst.v
.................................\.....\......\RAMSYS_inst.vhd
.................................\.....\......\synthesis
.................................\.....\......\.........\RAMSYS.debuginfo
.................................\.....\......\.........\RAMSYS.qip
.................................\.....\......\.........\RAMSYS.v
.................................\.....\......\.........\submodules
.................................\.....\......\.........\..........\RAMSYS_new_sdram_controller_0.v
.................................\.....\......\.........\..........\RAMSYS_pll_0.qip
.................................\.....\......\.........\..........\RAMSYS_pll_0.v
.................................\.....\......\.........\..........\altera_reset_controller.sdc
.................................\.....\......\.........\..........\altera_reset_controller.v
.................................\.....\......\.........\..........\altera_reset_synchronizer.v
.................................\.....\SDRAM.archive.rpt
.................................\.....\SDRAM.qpf
.................................\.....\SDRAM.qsf
.................................\.....\SDRAM.vhd.bak
.................................\.....\SDRAM_V1.qar
.................................\.....\SDRAM_V1.qarlog
.................................\.....\SDRAM_nativelink_simulation.rpt
.................................\.....\c5_pin_model_dump.txt
.................................\.....\db
.................................\.....\..\.cmp.kpt
.................................\.....\..\SDRAM.analyze_file.qmsg
.................................\.....\..\SDRAM.archive.qmsg
.................................\.....\..\SDRAM.asm.qmsg
.................................\.....\..\SDRAM.asm.rdb
.................................\.....\..\SDRAM.atom_fit.nvd
.................................\.....\..\SDRAM.cbx.xml
.................................\.....\..\SDRAM.cmp.bpm
.................................\.....\..\SDRAM.cmp.cdb
.................................\.....\..\SDRAM.cmp.hdb
.................................\.....\..\SDRAM.cmp.idb
.................................\.....\..\SDRAM.cmp.logdb
.................................\.....\..\SDRAM.cmp.rdb
.................................\.....\..\SDRAM.cmp_merge.kpt
.................................\.....\..\SDRAM.cyclonev_io_sim_cache.ff_0c_fast.hsd
.................................\.....\..\SDRAM.cyclonev_io_sim_cache.ff_85c_fast.hsd
.................................\.....\..\SDRAM.cyclonev_io_sim_cache.tt_0c_slow.hsd
.................................\.....\..\SDRAM.cyclonev_io_sim_cache.tt_85c_slow.hsd
.................................\.....\..\SDRAM.db_info
.................................\.....\..\SDRAM.eda.qmsg
.................................\.....\..\SDRAM.fit.qmsg
.................................\.....\..\SDRAM.hier_info
........
1999-2046 搜珍网 All Rights Reserved.
本站作为网络服务提供者，仅为网络服务对象提供信息存储空间，仅对用户上载内容的表现方式做保护处理，对上载内容本身不做任何修改或编辑。