万年历
工程说明
在FPGA设计中，数字万年历属于小规模集成电路。从原理上来讲，是典型的数字电路，包括组合逻辑电路和时序电路。基于FPGA开发除设计简便、开发成本低、电路简洁等，更具备功能设计灵活方面的优势。
案例补充说明
万年历是记录一定时间范围内的年历，其名称只是一种象征，表示时间跨度大。由于其功能非常常用，且极为方便人们查询使用，因此广泛应用于钟表、历书出版物、电子产品、电脑软件和手机应用等行业中。(Perpetual calendar

Engineering descr iption

In FPGA design, digital calendar belongs to small scale integrated circuit. In principle, it is a typical digital circuit, including combinational logic circuits and sequential circuits. Based on FPGA development, in addition to simple design, low cost of development, concise circuit, and more flexibility in functional design advantages.

Case Supplement

Calendar is a record of the calendar within a certain time range, its name is only a symbol, indicating that the time span is large. Because its function is very common, and very convenient for people to use the query, so it is widely used in watches, ephemeris publications, electronic products, computer software and mobile phone application etc..)