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文件名称:test42_CoreABC

  • 所属分类：
    VHDL/FPGA/Verilog
  • 标签属性：
    [C/C++] [源码]
  • 上传时间：
    2017-09-27
  • 文件大小：
    2.45mb
  • 已下载：
    0次
  • 提 供 者：
    us***
  • 相关连接：
    无
  • 下载说明：
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修正介绍说明

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VHDL
How to use CoreABC-IP with uart
microsemi project
相关搜索： vhdl COREabc

(系统自动生成,下载前可以参看下载内容)

下载文件列表

test42_CoreABC\component
test42_CoreABC\component\Actel
test42_CoreABC\component\Actel\DirectCore
test42_CoreABC\component\Actel\DirectCore\COREABC
test42_CoreABC\component\Actel\DirectCore\COREABC\3.7.101
test42_CoreABC\component\Actel\DirectCore\COREABC\3.7.101\COREABC.cxf
test42_CoreABC\component\Actel\DirectCore\COREABC\3.7.101\coreparameters.vhd
test42_CoreABC\component\Actel\DirectCore\CoreAPB3
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\CoreAPB3.cxf
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\coreparameters.vhd
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\mti
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\mti\scripts
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\mti\scripts\bfmtovec.exe
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\mti\scripts\bfmtovec.lin
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\mti\scripts\bfmtovec_compile.tcl
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\mti\scripts\coreapb3_usertb_master.bfm
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\mti\scripts\wave_user.do
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\amba_bfm
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\amba_bfm\bfm_ahbtoapb.vhd
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\amba_bfm\bfm_apb.vhd
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\amba_bfm\bfm_apbslave.vhd
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\amba_bfm\bfm_apbslaveext.vhd
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\amba_bfm\bfm_main.vhd
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\amba_bfm\bfm_package.vhd
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\amba_bfm\misc.vhd
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\amba_bfm\textio.vhd
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\core
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\core\components.vhd
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\core\coreapb3.vhd
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\core\coreapb3_iaddr_reg.vhd
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\core\coreapb3_muxptob3.vhd
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\test
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\test\user
test42_CoreABC\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\test\user\testbench.vhd
test42_CoreABC\component\Actel\DirectCore\CoreUARTapb
test42_CoreABC\component\Actel\DirectCore\CoreUARTapb\5.6.102
test42_CoreABC\component\Actel\DirectCore\CoreUARTapb\5.6.102\CoreUARTapb.cxf
test42_CoreABC\component\Actel\DirectCore\CoreUARTapb\5.6.102\mti
test42_CoreABC\component\Actel\DirectCore\CoreUARTapb\5.6.102\mti\scripts
test42_CoreABC\component\Actel\DirectCore\CoreUARTapb\5.6.102\mti\scripts\bfmtovec.exe
test42_CoreABC\component\Actel\DirectCore\CoreUARTapb\5.6.102\mti\scripts\bfmtovec.lin
test42_CoreABC\component\work
test42_CoreABC\component\work\DESIGN_FIRMWARE
test42_CoreABC\component\work\DESIGN_FIRMWARE\DESIGN_FIRMWARE.cxf
test42_CoreABC\component\work\DESIGN_FIRMWARE\DESIGN_FIRMWARE.sdb
test42_CoreABC\component\work\DESIGN_IO
test42_CoreABC\component\work\DESIGN_IO\DESIGN_IO.cxf
test42_CoreABC\component\work\DESIGN_IO\DESIGN_IO.sdb
test42_CoreABC\component\work\top
test42_CoreABC\component\work\top\COREABC_0
test42_CoreABC\component\work\top\COREABC_0\CoreABC.log
test42_CoreABC\component\work\top\COREABC_0\coreparameters_tgi.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\core
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\core\acmtable.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\core\components.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\core\coreabc.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\core\debugblk.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\core\instructions.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\core\instructnvm_bb.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\core\instructram.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\core\iram512x9_pa3.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\core\ram128x8_rtl.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\core\ram256x16_pa3.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\core\ram256x8_rtl.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\core\ramblocks.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\core\support.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\test
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\test\apbmodel.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\test\misc.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\test\testbench.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\test\testsupport.vhd
test42_CoreABC\component\work\top\COREABC_0\rtl\vhdl\test\textio.vhd
test42_CoreABC\component\work\top\COREABC_0\top_COREABC_0_COREABC.cxf
test42_CoreABC\component\work\top\COREABC_0\top_COREABC_0_Mem.c
test42_CoreABC\component\work\top\CoreUARTapb_0
test42_CoreABC\component\work\top\CoreUARTapb_0\coreparameters.vhd
test42_CoreABC\component\work\top\CoreUARTapb_0\mti
test42_CoreABC\component\work\top\CoreUARTapb_0\mti\scripts
test42_CoreABC\component\work\top\CoreUARTapb_0\mti\scripts\bfmtovec_compile.do
test42_CoreABC\component\work\top\CoreUARTapb_0\mti\scripts\coreuart_usertb_apb_master.bfm
test42_CoreABC\component\work\top\CoreUARTapb_0\mti\scripts\coreuart_usertb_include.bfm
test42_CoreABC\component\work\top\CoreUARTapb_0\mti\scripts\wave_vhdl_amba.do
test42_CoreABC\component\work\top\CoreUARTapb_0\rtl
test42_CoreABC\component\work\top\CoreUARTapb_0\rtl\vhdl
test42_CoreABC\component\work\top\CoreUARTapb_0\rtl\vhdl\amba_bfm
test42_CoreABC\component\work\top\CoreUARTapb_0\rtl\vhdl\amba_bfm\bfm_ahbl.vhd
test42_CoreABC\component\work\top\CoreUARTapb_0\rtl\vhdl\amba_bfm\bfm_ahblapb.vhd
test42_CoreABC\component\work\top\CoreUARTapb_0\rtl\vhdl\amba_bfm\bfm_ahbslave.vhd
test42_CoreABC\component\work\top\CoreUARTapb_0\rtl\vhdl\amba_bfm\bfm_ahbslaveext.vhd
test42_CoreABC\component\work\top\CoreUARTapb_0\rtl\vhdl\amba_bfm\bfm_ahbtoapb.vhd
test42_CoreABC\component\work\top\CoreUARTapb_0\rtl\vhdl\amba_bfm\bfm_apb.vhd
test42_CoreABC\component\work\top\CoreUARTapb_0\rtl\vhdl\amba_bfm\bfm_apbslave.vhd
test42_CoreABC\component\work\top\CoreUARTapb_0\rtl\vhdl\amba_bfm\bfm_apbslaveext.vhd
test42_CoreABC\component\work\top\CoreUARTapb_0\rtl\vhdl\amba_bfm\bfm_apbtoapb.vhd
test42_CoreABC\component\work\top\CoreUARTapb_0\rtl\vhdl\amba_bfm\bfm_main.vhd

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