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文件名称:gtx_aurora_zc706_example

  • 所属分类：
    VHDL/FPGA/Verilog
  • 标签属性：
    [Linux] [SHELL] [源码]
  • 上传时间：
    2018-01-23
  • 文件大小：
    33.16mb
  • 已下载：
    2次
  • 提 供 者：
    独*****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

Aurora 8B/10B协议是Xilinx公司针对高速传输开发的一种可裁剪的轻量级链路层协议，通过一条或多条串行链路实现两设备间的数据传输。协议Aurora协议可以支持流和帧两种数据传输模式，以及全双工、单工等数据通信方式。(The Aurora 8B / 10B protocol is a tailor-made lightweight link layer protocol developed by Xilinx for high-speed transmission that enables data transfer between two devices over one or more serial links. Protocol Aurora protocol can support two data transfer modes, stream and frame, as well as full-duplex, simplex and other data communications.)
相关搜索： Aurora verilog

(系统自动生成,下载前可以参看下载内容)

下载文件列表

文件名大小更新时间
gtx_aurora_zc706_example 0 2016-11-16
gtx_aurora_zc706_example\.Xil 0 2016-11-16
gtx_aurora_zc706_example\.Xil\Vivado-12268-WIN-H3F3F1NQB2K 0 2016-11-16
gtx_aurora_zc706_example\.Xil\Vivado-12268-WIN-H3F3F1NQB2K\coregen 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.cache 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.cache\compile_simlib 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.cache\wt 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.cache\wt\java_command_handlers.wdf 154 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.cache\wt\synthesis.wdf 3773 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.cache\wt\synthesis_details.wdf 100 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.cache\wt\webtalk_pa.xml 1418 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.cache\wt\xsim.wdf 256 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.hw 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.hw\gtx_aurora_zc706_example.lpr 290 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\.jobs 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\.jobs\vrs_config_1.xml 271 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\.jobs\vrs_config_2.xml 859 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\.jobs\vrs_config_3.xml 251 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\.jobs\vrs_config_4.xml 251 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\.jobs\vrs_config_5.xml 251 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\.jobs\vrs_config_6.xml 251 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\.jobs\vrs_config_7.xml 251 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\.vivado.begin.rst 184 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\.vivado.end.rst 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\.Vivado_Synthesis.queue.rst 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\.Xil 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\.Xil\asyn_fifo_propImpl.xdc 1162 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\asyn_fifo.dcp 350065 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\asyn_fifo.tcl 3504 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\asyn_fifo.vds 1674240 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\asyn_fifo_utilization_synth.pb 231 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\asyn_fifo_utilization_synth.rpt 7513 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\dont_touch.xdc 2471 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\gen_run.xml 2071 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\htr.txt 379 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\ISEWrap.js 4766 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\ISEWrap.sh 1622 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\project.wdf 1982 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\rundef.js 1367 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\runme.bat 229 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\runme.log 1684494 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\runme.sh 1196 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\vivado.jou 599 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\asyn_fifo_synth_1\vivado.pb 2174145 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\.vivado.begin.rst 183 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\.vivado.end.rst 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\.Vivado_Synthesis.queue.rst 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\.Xil 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\dont_touch.xdc 1421 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\gen_run.xml 2470 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\gtx_aurora_zc706_reg_slice_0.dcp 42513 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\gtx_aurora_zc706_reg_slice_0.tcl 3903 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\gtx_aurora_zc706_reg_slice_0.vds 27961 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\gtx_aurora_zc706_reg_slice_0_utilization_synth.pb 231 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\gtx_aurora_zc706_reg_slice_0_utilization_synth.rpt 7259 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\htr.txt 417 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\ISEWrap.js 4766 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\ISEWrap.sh 1622 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\rundef.js 1405 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\runme.bat 229 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\runme.log 28150 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\runme.sh 1234 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\vivado.jou 674 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_0_synth_1\vivado.pb 43821 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\.vivado.begin.rst 184 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\.vivado.end.rst 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\.Vivado_Synthesis.queue.rst 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\.Xil 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\dont_touch.xdc 1421 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\gen_run.xml 2470 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\gtx_aurora_zc706_reg_slice_2.dcp 40772 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\gtx_aurora_zc706_reg_slice_2.tcl 3903 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\gtx_aurora_zc706_reg_slice_2.vds 27961 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\gtx_aurora_zc706_reg_slice_2_utilization_synth.pb 231 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\gtx_aurora_zc706_reg_slice_2_utilization_synth.rpt 7259 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\htr.txt 417 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\ISEWrap.js 4766 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\ISEWrap.sh 1622 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\rundef.js 1405 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\runme.bat 229 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\runme.log 28150 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\runme.sh 1234 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\vivado.jou 674 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\gtx_aurora_zc706_reg_slice_2_synth_1\vivado.pb 43821 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\synth_1 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\synth_1\.vivado.begin.rst 183 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\synth_1\.vivado.end.rst 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\synth_1\.Vivado_Synthesis.queue.rst 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\synth_1\.Xil 0 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\synth_1\.Xil\gtx_aurora_zc706_exdes_propImpl.xdc 5586 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\synth_1\dont_touch.xdc 357 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\synth_1\gen_run.xml 8333 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\synth_1\gtx_aurora_zc706_exdes.dcp 127503 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\synth_1\gtx_aurora_zc706_exdes.tcl 5357 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\synth_1\gtx_aurora_zc706_exdes.vds 87771 2016-11-16
gtx_aurora_zc706_example\gtx_aurora_zc706_example.runs\synth_1\gtx_aurora_zc706_exdes_utilization_synth.pb 231 2016-11-16

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