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文件名称:project_2

  • 所属分类：
    其他
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2018-03-20
  • 文件大小：
    114kb
  • 已下载：
    0次
  • 提 供 者：
    heheh*****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

使用Verilog完成椭圆曲线的取整运算操作(compute curve mod calculation)
相关搜索： 取整操作 verilog

(系统自动生成,下载前可以参看下载内容)

下载文件列表

文件名大小更新时间
project_2 0 2017-11-20
project_2\project_2.cache 0 2017-10-22
project_2\project_2.cache\wt 0 2017-10-22
project_2\project_2.cache\wt\java_command_handlers.wdf 414 2017-10-22
project_2\project_2.cache\wt\synthesis.wdf 2967 2017-10-22
project_2\project_2.cache\wt\webtalk_pa.xml 1350 2017-10-22
project_2\project_2.cache\wt\xsim.wdf 256 2017-10-22
project_2\project_2.hw 0 2017-10-22
project_2\project_2.hw\hw_1 0 2017-10-22
project_2\project_2.hw\hw_1\hw.xml 488 2017-10-22
project_2\project_2.hw\hw_1\wave 0 2018-03-20
project_2\project_2.runs 0 2017-10-22
project_2\project_2.runs\.jobs 0 2017-10-22
project_2\project_2.runs\.jobs\vrs_config_1.xml 212 2017-10-22
project_2\project_2.runs\.jobs\vrs_config_2.xml 212 2017-10-22
project_2\project_2.runs\.jobs\vrs_config_3.xml 408 2017-10-22
project_2\project_2.runs\.jobs\vrs_config_4.xml 233 2017-10-22
project_2\project_2.runs\.jobs\vrs_config_5.xml 233 2017-10-22
project_2\project_2.runs\.jobs\vrs_config_6.xml 226 2017-10-22
project_2\project_2.runs\impl_1 0 2017-11-20
project_2\project_2.runs\impl_1\.Vivado_Implementation.queue.rst 0 2017-10-22
project_2\project_2.runs\impl_1\.Xil 0 2017-10-22
project_2\project_2.runs\impl_1\.Xil\Vivado-5576-PC201705051341 0 2017-10-22
project_2\project_2.runs\impl_1\.Xil\Vivado-5576-PC201705051341\wt 0 2018-03-20
project_2\project_2.runs\impl_1\.init_design.begin.rst 188 2017-10-22
project_2\project_2.runs\impl_1\.init_design.end.rst 0 2017-10-22
project_2\project_2.runs\impl_1\.opt_design.begin.rst 188 2017-10-22
project_2\project_2.runs\impl_1\.vivado.begin.rst 187 2017-10-22
project_2\project_2.runs\impl_1\ISEWrap.js 4766 2017-10-22
project_2\project_2.runs\impl_1\ISEWrap.sh 1622 2017-10-22
project_2\project_2.runs\impl_1\gen_run.xml 4403 2017-10-22
project_2\project_2.runs\impl_1\htr.txt 375 2017-10-22
project_2\project_2.runs\impl_1\init_design.pb 5140 2017-10-22
project_2\project_2.runs\impl_1\opt_design.pb 1276 2017-10-22
project_2\project_2.runs\impl_1\place_design.pb 13141 2017-10-22
project_2\project_2.runs\impl_1\project.wdf 1838 2017-10-22
project_2\project_2.runs\impl_1\route_design.pb 6930 2017-10-22
project_2\project_2.runs\impl_1\rundef.js 1330 2017-10-22
project_2\project_2.runs\impl_1\runme.bat 229 2017-10-22
project_2\project_2.runs\impl_1\runme.log 4695 2017-10-22
project_2\project_2.runs\impl_1\runme.sh 1152 2017-10-22
project_2\project_2.runs\impl_1\top.tcl 3953 2017-10-22
project_2\project_2.runs\impl_1\top.vdi 4777 2017-10-22
project_2\project_2.runs\impl_1\top_2768.backup.vdi 18778 2017-10-22
project_2\project_2.runs\impl_1\vivado.jou 488 2017-10-22
project_2\project_2.runs\impl_1\vivado.pb 0 2017-10-22
project_2\project_2.runs\impl_1\vivado_2768.backup.jou 488 2017-10-22
project_2\project_2.runs\impl_1\vivado_3504.backup.jou 488 2017-10-22
project_2\project_2.runs\synth_1 0 2017-10-22
project_2\project_2.runs\synth_1\.Vivado_Synthesis.queue.rst 0 2017-10-22
project_2\project_2.runs\synth_1\.Xil 0 2018-03-20
project_2\project_2.runs\synth_1\.vivado.begin.rst 187 2017-10-22
project_2\project_2.runs\synth_1\.vivado.end.rst 0 2017-10-22
project_2\project_2.runs\synth_1\ISEWrap.js 4766 2017-10-22
project_2\project_2.runs\synth_1\ISEWrap.sh 1622 2017-10-22
project_2\project_2.runs\synth_1\gen_run.xml 2059 2017-10-22
project_2\project_2.runs\synth_1\htr.txt 358 2017-10-22
project_2\project_2.runs\synth_1\rundef.js 1250 2017-10-22
project_2\project_2.runs\synth_1\runme.bat 229 2017-10-22
project_2\project_2.runs\synth_1\runme.log 20316 2017-10-22
project_2\project_2.runs\synth_1\runme.sh 1079 2017-10-22
project_2\project_2.runs\synth_1\top.dcp 3034 2017-10-22
project_2\project_2.runs\synth_1\top.tcl 1341 2017-10-22
project_2\project_2.runs\synth_1\top.vds 20171 2017-10-22
project_2\project_2.runs\synth_1\top_utilization_synth.pb 233 2017-10-22
project_2\project_2.runs\synth_1\top_utilization_synth.rpt 6894 2017-10-22
project_2\project_2.runs\synth_1\vivado.jou 480 2017-10-22
project_2\project_2.runs\synth_1\vivado.pb 29431 2017-10-22
project_2\project_2.sim 0 2017-10-22
project_2\project_2.sim\sim_1 0 2017-10-22
project_2\project_2.sim\sim_1\behav 0 2017-10-22
project_2\project_2.sim\sim_1\behav\.Xil 0 2017-10-22
project_2\project_2.sim\sim_1\behav\.Xil\Webtalk-5408-PC201705051341 0 2017-10-22
project_2\project_2.sim\sim_1\behav\.Xil\Webtalk-5408-PC201705051341\webtalk 0 2018-03-20
project_2\project_2.sim\sim_1\behav\compile.bat 264 2017-10-22
project_2\project_2.sim\sim_1\behav\compile.log 574 2017-10-22
project_2\project_2.sim\sim_1\behav\elaborate.bat 394 2017-10-22
project_2\project_2.sim\sim_1\behav\elaborate.log 778 2017-10-22
project_2\project_2.sim\sim_1\behav\glbl.v 1470 2017-10-21
project_2\project_2.sim\sim_1\behav\simul.tcl 460 2017-10-22
project_2\project_2.sim\sim_1\behav\simul_behav.wdb 8958 2017-10-22
project_2\project_2.sim\sim_1\behav\simul_vlog.prj 252 2017-10-22
project_2\project_2.sim\sim_1\behav\simulate.bat 272 2017-10-22
project_2\project_2.sim\sim_1\behav\simulate.log 0 2017-10-22
project_2\project_2.sim\sim_1\behav\webtalk.jou 593 2017-10-22
project_2\project_2.sim\sim_1\behav\webtalk.log 1067 2017-10-22
project_2\project_2.sim\sim_1\behav\xelab.pb 1592 2017-10-22
project_2\project_2.sim\sim_1\behav\xsim.dir 0 2017-10-22
project_2\project_2.sim\sim_1\behav\xsim.dir\simul_behav 0 2017-10-22
project_2\project_2.sim\sim_1\behav\xsim.dir\simul_behav\Compile_Options.txt 228 2017-10-22
project_2\project_2.sim\sim_1\behav\xsim.dir\simul_behav\simul_behav_1652_1508661173.btree 0 2017-10-22
project_2\project_2.sim\sim_1\behav\xsim.dir\simul_behav\webtalk 0 2017-10-22
project_2\project_2.sim\sim_1\behav\xsim.dir\simul_behav\webtalk\.xsim_webtallk.info 0 2017-10-22
project_2\project_2.sim\sim_1\behav\xsim.dir\simul_behav\webtalk\usage_statistics_ext_xsim.html 3619 2017-10-22
project_2\project_2.sim\sim_1\behav\xsim.dir\simul_behav\webtalk\usage_statistics_ext_xsim.xml 3606 2017-10-22
project_2\project_2.sim\sim_1\behav\xsim.dir\simul_behav\xsim.dbg 5864 2017-10-22
project_2\project_2.sim\sim_1\behav\xsim.dir\simul_behav\xsim.mem 14668 2017-10-22
project_2\project_2.sim\sim_1\behav\xsim.dir\simul_behav\xsim.reloc 4066 2017-10-22
project_2\project_2.sim\sim_1\behav\xsim.dir\simul_behav\xsim.rtti 182 2017-10-22
project_2\project_2.sim\sim_1\behav\xsim.dir\simul_behav\xsim.svtype 8 2017-10-22

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