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文件名称:Verilog_Example

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [WORD]
  • 上传时间：
    2012-11-16
  • 文件大小：
    1.79mb
  • 已下载：
    0次
  • 提 供 者：
    洪***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
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介绍说明－－下载内容来自于网络，使用问题请自行百度

设计与验证Verilog_实例，经典的HDl书籍，强烈推荐-Design and verification Verilog_ examples Hdl classic books, strongly recommend
(系统自动生成,下载前可以参看下载内容)

下载文件列表

Example-2-1
Example-2-1/HelloVlog.v
Example-3-1
Example-3-1/FullAdd.v
Example-3-1/transcript
Example-3-2
Example-3-2/FullAdd.v
Example-3-3
Example-3-3/CRC10.v
Example-4-1
Example-4-1/cnt.prd
Example-4-1/cnt.prj
Example-4-1/rev_1
Example-4-1/rev_1/cnt1.edf
Example-4-1/rev_1/cnt1.fse
Example-4-1/rev_1/cnt1.srm
Example-4-1/rev_1/cnt1.srr
Example-4-1/rev_1/cnt1.srs
Example-4-1/rev_1/cnt1.tlg
Example-4-1/rev_1/cnt2.edf
Example-4-1/rev_1/cnt2.fse
Example-4-1/rev_1/cnt2.srm
Example-4-1/rev_1/cnt2.srr
Example-4-1/rev_1/cnt2.srs
Example-4-1/rev_1/cnt2.tlg
Example-4-1/rev_1/cnt3.edf
Example-4-1/rev_1/cnt3.fse
Example-4-1/rev_1/cnt3.srm
Example-4-1/rev_1/cnt3.srr
Example-4-1/rev_1/cnt3.srs
Example-4-1/rev_1/cnt3.tlg
Example-4-1/rev_1/par_1
Example-4-1/rev_1/syntmp
Example-4-1/rev_1/syntmp/cnt1.plg
Example-4-1/rev_1/syntmp/cnt2.msg
Example-4-1/rev_1/syntmp/cnt2.plg
Example-4-1/rev_1/syntmp/cnt3.msg
Example-4-1/rev_1/syntmp/cnt3.plg
Example-4-1/source
Example-4-1/source/cnt1.v
Example-4-1/source/cnt2.v
Example-4-1/source/cnt3.v
Example-4-1/source/syntmp.msg
Example-4-1/示例说明.doc
Example-4-10
Example-4-10/bibus
Example-4-10/bibus/bibus.prd
Example-4-10/bibus/bibus.prj
Example-4-10/bibus/bibus.v
Example-4-10/bibus/decode.v
Example-4-10/bibus/rev_1
Example-4-10/bibus/rev_1/bibus.fse
Example-4-10/bibus/rev_1/bibus.srd
Example-4-10/bibus/rev_1/bibus.srm
Example-4-10/bibus/rev_1/bibus.srr
Example-4-10/bibus/rev_1/bibus.srs
Example-4-10/bibus/rev_1/bibus.sxr
Example-4-10/bibus/rev_1/bibus.tcl
Example-4-10/bibus/rev_1/bibus.tlg
Example-4-10/bibus/rev_1/bibus.vqm
Example-4-10/bibus/rev_1/bibus.xrf
Example-4-10/bibus/rev_1/bibus_cons.tcl
Example-4-10/bibus/rev_1/bibus_rm.tcl
Example-4-10/bibus/rev_1/rpt_bibus.areasrr
Example-4-10/bibus/rev_1/rpt_bibus_areasrr.htm
Example-4-10/bibus/rev_1/syntmp
Example-4-10/bibus/rev_1/syntmp/bibus.msg
Example-4-10/bibus/rev_1/syntmp/bibus.plg
Example-4-10/bibus/rev_1/syntmp/bibus_cons_ui.tcl
Example-4-10/bibus/rev_1/verif
Example-4-10/bibus/rev_1/verif/bibus.vif
Example-4-10/bibus/syntmp.msg
Example-4-10/complex_bibus
Example-4-10/complex_bibus/complex_bibus.prd
Example-4-10/complex_bibus/complex_bibus.prj
Example-4-10/complex_bibus/complex_bibus.v
Example-4-10/complex_bibus/complex_bibus2.v
Example-4-10/complex_bibus/counter.v
Example-4-10/complex_bibus/decode.v
Example-4-10/complex_bibus/rev_1
Example-4-10/complex_bibus/rev_1/AutoConstraint_complex_bibus.sdc
Example-4-10/complex_bibus/rev_1/complex_bibus.fse
Example-4-10/complex_bibus/rev_1/complex_bibus.srd
Example-4-10/complex_bibus/rev_1/complex_bibus.srm
Example-4-10/complex_bibus/rev_1/complex_bibus.srr
Example-4-10/complex_bibus/rev_1/complex_bibus.srs
Example-4-10/complex_bibus/rev_1/complex_bibus.sxr
Example-4-10/complex_bibus/rev_1/complex_bibus.tcl
Example-4-10/complex_bibus/rev_1/complex_bibus.tlg
Example-4-10/complex_bibus/rev_1/complex_bibus.vqm
Example-4-10/complex_bibus/rev_1/complex_bibus.xrf
Example-4-10/complex_bibus/rev_1/complex_bibus2.fse
Example-4-10/complex_bibus/rev_1/complex_bibus2.srd
Example-4-10/complex_bibus/rev_1/complex_bibus2.srm
Example-4-10/complex_bibus/rev_1/complex_bibus2.srr
Example-4-10/complex_bibus/rev_1/complex_bibus2.srs
Example-4-10/complex_bibus/rev_1/complex_bibus2.sxr
Example-4-10/complex_bibus/rev_1/complex_bibus2.tcl
Example-4-10/complex_bibus/rev_1/complex_bibus2.tlg
Example-4-10/complex_bibus/rev_1/complex_bibus2.vqm
Example-4-10/complex_bibus/rev_1/complex_bibus2.xrf
Example-4-10/complex_bibus/rev_1/complex_bibus2_cons.tcl
Example-4-10/complex_bibus/rev_1/complex_bibus2_rm.tcl
Example-4-10/complex_bibus/rev_1/complex_bibus_cons.tcl
Example-4-10/complex_bibus/rev_1/complex_bibus_rm.tcl
Example-4-10/complex_bibus/rev_1/decode.srr
Example-4-10/complex_bibus/rev_1/par_1
Example-4-10/complex_bibus/rev_1/rpt_complex_bibus.areasrr
Example-4-10/complex_bibus/rev_1/rpt_complex_bibus_areasrr.htm
Example-4-10/complex_bibus/rev_1/syntmp
Example-4-10/complex_bibus/rev_1/syntmp/complex_bibus.msg
Example-4-10/complex_bibus/rev_1/syntmp/complex_bibus.plg
Example-4-10/complex_bibus/rev_1/syntmp/complex_bibus2.plg
Example-4-10/complex_bibus/rev_1/syntmp/complex_bibus2_cons_ui.tcl
Example-4-10/complex_bibus/rev_1/syntmp/complex_bibus_cons_ui.tcl
Example-4-10/complex_bibus/rev_1/verif
Example-4-10/complex_bibus/rev_1/verif/complex_bibus.vif
Example-4-10/complex_bibus/rev_1/verif/complex_bibus2.vif
Example-4-10/complex_bibus/syntmp.msg
Example-4-10/source
Example-4-10/source/bibus.v
Example-4-10/source/complex_bibus.v
Example-4-10/source/complex_bibus2.v
Example-4-10/source/counter.v
Example-4-10/source/decode.v
Example-4-10/示例说明.doc
Example-4-11
Example-4-11/mux.prd
Example-4-11/mux.prj
Example-4-11/mux.v
Example-4-11/mux2.v
Example-4-11/rev_1
Example-4-11/rev_1/AutoConstraint_mux.sdc
Example-4-11/rev_1/generic.fse
Example-4-11/rev_1/generic.srd
Example-4-11/rev_1/mux.edf
Example-4-11/rev_1/mux.edn
Example-4-11/rev_1/mux.fse
Example-4-11/rev_1/mux.ncf
Example-4-11/rev_1/mux.prf
Example-4-11/rev_1/mux.srd
Example-4-11/rev_1/mux.srm
Example-4-11/rev_1/mux.srr
Example-4-11/rev_1/mux.srs
Example-4-11/rev_1/mux.sxr
Example-4-11/rev_1/m

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