文件名称:uart2fli
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- 上传时间:2012-11-16
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文件大小:89.9kb
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Modelsim FLI接口设计实例,适合学习Modelsim fli接口编程者学习。-Modelsim FLI interface design for learning Modelsim fli learn programming interface.
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下载文件列表
UART_FLI/
UART_FLI/fli/
UART_FLI/fli/cif_init_uart.c
UART_FLI/fli/compile.bat
UART_FLI/fli_linux/
UART_FLI/fli_linux/cif_init_uart.c
UART_FLI/fli_linux/compile
UART_FLI/fli_linux/uart_tester.so
UART_FLI/hdl/
UART_FLI/hdl/clkgen_behaviour.vhd
UART_FLI/hdl/fedgen.vhd
UART_FLI/hdl/fli_socket_behaviour.vhd
UART_FLI/hdl/redgen.vhd
UART_FLI/hdl/resetgen_behaviour.vhd
UART_FLI/hdl/uartrx.vhd
UART_FLI/hdl/uarttx.vhd
UART_FLI/hdl/uart_fli_top_struct.vhd
UART_FLI/hdl/uart_fli_top_tb_struct.vhd
UART_FLI/hdl/uart_struct.vhd
UART_FLI/hdl/utils_pkg.vhd
UART_FLI/hds/
UART_FLI/hds/.cache.dat
UART_FLI/hds/.hdlsidedata/
UART_FLI/hds/.hdlsidedata/_clkgen_behaviour.vhd._fpf
UART_FLI/hds/.hdlsidedata/_fli_socket_behaviour.vhd._fpf
UART_FLI/hds/.hdlsidedata/_resetgen_behaviour.vhd._fpf
UART_FLI/hds/.hdlsidedata/_uarttx.vhd._fpf
UART_FLI/hds/.xrf/
UART_FLI/hds/.xrf/uart_fli_top_struct.xrf
UART_FLI/hds/.xrf/uart_fli_top_tb_struct.xrf
UART_FLI/hds/.xrf/uart_struct.xrf
UART_FLI/hds/clkgen/
UART_FLI/hds/clkgen/symbol.sb
UART_FLI/hds/fli_socket/
UART_FLI/hds/fli_socket/symbol.sb
UART_FLI/hds/resetgen/
UART_FLI/hds/resetgen/symbol.sb
UART_FLI/hds/uart/
UART_FLI/hds/uart/struct.bd
UART_FLI/hds/uart/symbol.sb
UART_FLI/hds/uart_fli_top/
UART_FLI/hds/uart_fli_top/struct.bd
UART_FLI/hds/uart_fli_top/symbol.sb
UART_FLI/hds/uart_fli_top/_struct.bd._fpf
UART_FLI/hds/uart_fli_top_tb/
UART_FLI/hds/uart_fli_top_tb/struct.bd
UART_FLI/hds/uart_fli_top_tb/symbol.sb
UART_FLI/hds/_uartrx._epf
UART_FLI/hds/_uarttx._epf
UART_FLI/fli/
UART_FLI/fli/cif_init_uart.c
UART_FLI/fli/compile.bat
UART_FLI/fli_linux/
UART_FLI/fli_linux/cif_init_uart.c
UART_FLI/fli_linux/compile
UART_FLI/fli_linux/uart_tester.so
UART_FLI/hdl/
UART_FLI/hdl/clkgen_behaviour.vhd
UART_FLI/hdl/fedgen.vhd
UART_FLI/hdl/fli_socket_behaviour.vhd
UART_FLI/hdl/redgen.vhd
UART_FLI/hdl/resetgen_behaviour.vhd
UART_FLI/hdl/uartrx.vhd
UART_FLI/hdl/uarttx.vhd
UART_FLI/hdl/uart_fli_top_struct.vhd
UART_FLI/hdl/uart_fli_top_tb_struct.vhd
UART_FLI/hdl/uart_struct.vhd
UART_FLI/hdl/utils_pkg.vhd
UART_FLI/hds/
UART_FLI/hds/.cache.dat
UART_FLI/hds/.hdlsidedata/
UART_FLI/hds/.hdlsidedata/_clkgen_behaviour.vhd._fpf
UART_FLI/hds/.hdlsidedata/_fli_socket_behaviour.vhd._fpf
UART_FLI/hds/.hdlsidedata/_resetgen_behaviour.vhd._fpf
UART_FLI/hds/.hdlsidedata/_uarttx.vhd._fpf
UART_FLI/hds/.xrf/
UART_FLI/hds/.xrf/uart_fli_top_struct.xrf
UART_FLI/hds/.xrf/uart_fli_top_tb_struct.xrf
UART_FLI/hds/.xrf/uart_struct.xrf
UART_FLI/hds/clkgen/
UART_FLI/hds/clkgen/symbol.sb
UART_FLI/hds/fli_socket/
UART_FLI/hds/fli_socket/symbol.sb
UART_FLI/hds/resetgen/
UART_FLI/hds/resetgen/symbol.sb
UART_FLI/hds/uart/
UART_FLI/hds/uart/struct.bd
UART_FLI/hds/uart/symbol.sb
UART_FLI/hds/uart_fli_top/
UART_FLI/hds/uart_fli_top/struct.bd
UART_FLI/hds/uart_fli_top/symbol.sb
UART_FLI/hds/uart_fli_top/_struct.bd._fpf
UART_FLI/hds/uart_fli_top_tb/
UART_FLI/hds/uart_fli_top_tb/struct.bd
UART_FLI/hds/uart_fli_top_tb/symbol.sb
UART_FLI/hds/_uartrx._epf
UART_FLI/hds/_uarttx._epf
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