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文件名称:spi_op_core
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- 上传时间：2012-11-16
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文件大小：80.69kb
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已下载：1次
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SPI协议的Verilog编程，包括时钟的产生模块，控制模块等-Verilog programming SPI protocol, including the selection of the clock module, control module, etc.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
spi_op_core/spi.pdf
spi_op_core/spi_clgen.v
spi_op_core/spi_defines.v
spi_op_core/spi_shift.v
spi_op_core/spi_top.v
spi_op_core/tb/spi_slave_model.v
spi_op_core/tb/tb_spi_top.v
spi_op_core/tb/wb_master_model.v
spi_op_core/tb
spi_op_core/timescale.v
spi_op_core/transcript
spi_op_core
spi_op_core/spi_clgen.v
spi_op_core/spi_defines.v
spi_op_core/spi_shift.v
spi_op_core/spi_top.v
spi_op_core/tb/spi_slave_model.v
spi_op_core/tb/tb_spi_top.v
spi_op_core/tb/wb_master_model.v
spi_op_core/tb
spi_op_core/timescale.v
spi_op_core/transcript
spi_op_core
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