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文件名称:DW8051_ALL
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- 上传时间:2012-11-16
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文件大小:1.51mb
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包中包括,
DW8051完整的Verilog HDL代码
两本手册:
DesignWare Library DW8051 MacroCell, Datasheet
DesignWare DW8051 MacroCell Databook
三篇51论文:
基于IP 核的PSTN 短消息终端SoC 软硬件协同设计
Embedded TCP/ IP Chip Based on DW8051 Core
以8051为核的SOC中的万年历的设计 -DW8051 is designed by synopsys, and its instruction cycle is 4 clock, which lead to about 3 times faster than Intel 8051 with the same oscillator frequency. I writed ram, rom, some other perpherals such as DES, RNG, and its testbench, and it worked all right!
DW8051完整的Verilog HDL代码
两本手册:
DesignWare Library DW8051 MacroCell, Datasheet
DesignWare DW8051 MacroCell Databook
三篇51论文:
基于IP 核的PSTN 短消息终端SoC 软硬件协同设计
Embedded TCP/ IP Chip Based on DW8051 Core
以8051为核的SOC中的万年历的设计 -DW8051 is designed by synopsys, and its instruction cycle is 4 clock, which lead to about 3 times faster than Intel 8051 with the same oscillator frequency. I writed ram, rom, some other perpherals such as DES, RNG, and its testbench, and it worked all right!
相关搜索: dw8051
ip core
designware
TCP VHDL
Synopsys
DW80
dw8051 vh
DW8051_HDL.rar
8051 VHDL
synopsys DW80
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下载文件列表
DW8051.txt
dw8051.pdf
DW8051_applications.rar
DW8051_databook.rar
DW8051_verilog.rar
dw8051.pdf
DW8051_applications.rar
DW8051_databook.rar
DW8051_verilog.rar
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