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文件名称:EDA_project

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
  • 上传时间：
    2012-11-16
  • 文件大小：
    2.27mb
  • 已下载：
    0次
  • 提 供 者：
    李****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

基于Verilog和VHDL的DDS程序

基于VHDL的8位十进制频率计

-Verilog and VHDL based on the DDS process VHDL-based 8-bit decimal Cymometer
(系统自动生成,下载前可以参看下载内容)

下载文件列表

EDA_project/DDS/dds.vhd
EDA_project/DDS/sum32.vhd
EDA_project/DDS/reg1.vhd
EDA_project/DDS/adder32.vhd
EDA_project/DDS/reg2.vhd
EDA_project/DDS/dds.qpf
EDA_project/DDS/dds.qsf
EDA_project/DDS/dds.map.rpt
EDA_project/DDS/dds.flow.rpt
EDA_project/DDS/dds.map.summary
EDA_project/DDS/dds.pin
EDA_project/DDS/dds.fit.rpt
EDA_project/DDS/dds.fit.summary
EDA_project/DDS/dds.sof
EDA_project/DDS/dds.pof
EDA_project/DDS/dds.asm.rpt
EDA_project/DDS/dds.tan.summary
EDA_project/DDS/dds.tan.rpt
EDA_project/DDS/dds.done
EDA_project/DDS/dds.qws
EDA_project/DDS/db/dds.hif
EDA_project/DDS/db/dds.db_info
EDA_project/DDS/db/dds.map.qmsg
EDA_project/DDS/db/dds.(0).cnf.cdb
EDA_project/DDS/db/dds.cmp.rdb
EDA_project/DDS/db/dds.(0).cnf.hdb
EDA_project/DDS/db/dds.(1).cnf.cdb
EDA_project/DDS/db/dds.(1).cnf.hdb
EDA_project/DDS/db/dds.(2).cnf.cdb
EDA_project/DDS/db/dds.psp
EDA_project/DDS/db/dds.cbx.xml
EDA_project/DDS/db/dds.(2).cnf.hdb
EDA_project/DDS/db/dds.(3).cnf.cdb
EDA_project/DDS/db/dds.(3).cnf.hdb
EDA_project/DDS/db/dds.(4).cnf.cdb
EDA_project/DDS/db/dds.(4).cnf.hdb
EDA_project/DDS/db/dds.hier_info
EDA_project/DDS/db/dds.rtlv_sg.cdb
EDA_project/DDS/db/dds.rtlv_sg_swap.cdb
EDA_project/DDS/db/dds.rtlv.hdb
EDA_project/DDS/db/dds.pre_map.hdb
EDA_project/DDS/db/dds.pre_map.cdb
EDA_project/DDS/db/dds.dbp
EDA_project/DDS/db/add_sub_hjh.tdf
EDA_project/DDS/db/dds.(5).cnf.cdb
EDA_project/DDS/db/dds.(5).cnf.hdb
EDA_project/DDS/db/dds.(6).cnf.cdb
EDA_project/DDS/db/dds.(6).cnf.hdb
EDA_project/DDS/db/dds.(7).cnf.cdb
EDA_project/DDS/db/dds.(7).cnf.hdb
EDA_project/DDS/db/dds.(8).cnf.cdb
EDA_project/DDS/db/dds.(8).cnf.hdb
EDA_project/DDS/db/dds.(9).cnf.cdb
EDA_project/DDS/db/dds.(9).cnf.hdb
EDA_project/DDS/db/dds.(10).cnf.cdb
EDA_project/DDS/db/dds.(10).cnf.hdb
EDA_project/DDS/db/dds.map.logdb
EDA_project/DDS/db/dds.sgdiff.cdb
EDA_project/DDS/db/dds.sgdiff.hdb
EDA_project/DDS/db/dds.sld_design_entry_dsc.sci
EDA_project/DDS/db/dds.syn_hier_info
EDA_project/DDS/db/dds.fit.qmsg
EDA_project/DDS/db/dds.map.cdb
EDA_project/DDS/db/dds.map.hdb
EDA_project/DDS/db/dds.cmp.logdb
EDA_project/DDS/db/dds.asm.qmsg
EDA_project/DDS/db/dds.cmp.cdb
EDA_project/DDS/db/dds.cmp.hdb
EDA_project/DDS/db/dds.tan.qmsg
EDA_project/DDS/db/dds.cmp.tdb
EDA_project/DDS/db/dds.cmp0.ddb
EDA_project/DDS/db/dds.sld_design_entry.sci
EDA_project/DDS/db/dds.eco.cdb
EDA_project/frequency-test_VHDL/ADDER.vhd
EDA_project/frequency-test_VHDL/pinlvji.cdf
EDA_project/frequency-test_VHDL/pinlvji.qpf
EDA_project/frequency-test_VHDL/pinlvji.vwf
EDA_project/frequency-test_VHDL/pinlvji.asm.rpt
EDA_project/frequency-test_VHDL/pinlvji.done
EDA_project/frequency-test_VHDL/pinlvji.dpf
EDA_project/frequency-test_VHDL/pinlvji.fit.rpt
EDA_project/frequency-test_VHDL/pinlvji.fit.summary
EDA_project/frequency-test_VHDL/pinlvji.flow.rpt
EDA_project/frequency-test_VHDL/pinlvji.map.rpt
EDA_project/frequency-test_VHDL/pinlvji.map.summary
EDA_project/frequency-test_VHDL/pinlvji.pin
EDA_project/frequency-test_VHDL/pinlvji.pof
EDA_project/frequency-test_VHDL/pinlvji.qsf
EDA_project/frequency-test_VHDL/pinlvji.qws
EDA_project/frequency-test_VHDL/pinlvji.sim.rpt
EDA_project/frequency-test_VHDL/pinlvji.sof
EDA_project/frequency-test_VHDL/pinlvji.tan.rpt
EDA_project/frequency-test_VHDL/pinlvji.tan.summary
EDA_project/frequency-test_VHDL/REG.vhd
EDA_project/frequency-test_VHDL/TEST.vhd
EDA_project/frequency-test_VHDL/TOP.vhd
EDA_project/frequency-test_VHDL/db/wed.zsf
EDA_project/frequency-test_VHDL/db/pinlvji.db_info
EDA_project/frequency-test_VHDL/db/pinlvji.cbx.xml
EDA_project/frequency-test_VHDL/db/pinlvji.hif
EDA_project/frequency-test_VHDL/db/pinlvji.(2).cnf.cdb
EDA_project/frequency-test_VHDL/db/pinlvji.(2).cnf.hdb
EDA_project/frequency-test_VHDL/db/pinlvji.hier_info
EDA_project/frequency-test_VHDL/db/pinlvji.sim.qmsg
EDA_project/frequency-test_VHDL/db/pinlvji.sim.hdb
EDA_project/frequency-test_VHDL/db/pinlvji.psp
EDA_project/frequency-test_VHDL/db/pinlvji.dbp
EDA_project/frequency-test_VHDL/db/pinlvji.syn_hier_info
EDA_project/frequency-test_VHDL/db/pinlvji.sim.vwf
EDA_project/frequency-test_VHDL/db/pinlvji.sim.rdb
EDA_project/frequency-test_VHDL/db/pinlvji.eds_overflow
EDA_project/frequency-test_VHDL/db/pinlvji.map.qmsg
EDA_project/frequency-test_VHDL/db/pinlvji.(0).cnf.cdb
EDA_project/frequency-test_VHDL/db/pinlvji.(0).cnf.hdb
EDA_project/frequency-test_VHDL/db/pinlvji.(1).cnf.cdb
EDA_project/frequency-test_VHDL/db/pinlvji.(1).cnf.hdb
EDA_project/frequency-test_VHDL/db/pinlvji.(3).cnf.cdb
EDA_project/frequency-test_VHDL/db/pinlvji.(3).cnf.hdb
EDA_project/frequency-test_VHDL/db/pinlvji.rtlv_sg.cdb
EDA_project/frequency-test_VHDL/db/pinlvji.rtlv.hdb
EDA_project/frequency-test_VHDL/db/pinlvji.rtlv_sg_swap.cdb
EDA_project/frequency-test_VHDL/db/pinlvji.pre_map.hdb
EDA_project/frequency-test_VHDL/db/pinlvji.pre_map.cdb
EDA_project/frequency-test_VHDL/db/pinlvji.(4).cnf.cdb
EDA_project/frequency-test_VHDL/db/pinlvji.(4).cnf.hdb
EDA_project/frequency-test_VHDL/db/pinlvji.(5).cnf.cdb
EDA_project/frequency-test_VHDL/db/pinlvji.(5).cnf.hdb
EDA_project/frequency-test_VHDL/db/pinlvji.map.logdb
EDA_project/frequency-test_VHDL/db/pin

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