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文件名称:uart_test_ok_921

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    2012-11-16
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    370.52kb
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一个简单的uart 源码,接收一个字符并发回,通过测试,可以使用的,输入时钟12mhz,发送速率96-A simple uart source code, receiving a character and send back through the test, can be used, input clock 12mhz, sending rate 9600
相关搜索: UART 9600 VHDL

(系统自动生成,下载前可以参看下载内容)

下载文件列表

uart_test_ok_921/device_usage_statistics.html
uart_test_ok_921/output.txt
uart_test_ok_921/pa.fromHdl.tcl
uart_test_ok_921/pa.fromHdlPorts.tcl
uart_test_ok_921/pa.fromNetlist.tcl
uart_test_ok_921/patmp/rx_test_917.data/da/elab.xml
uart_test_ok_921/patmp/rx_test_917.data/floorplans/floorplan_1/iseloc.xml
uart_test_ok_921/patmp/rx_test_917.data/floorplans/floorplan_1/pfi.xml
uart_test_ok_921/patmp/rx_test_917.data/floorplans/floorplan_1/pfp.xml
uart_test_ok_921/patmp/rx_test_917.data/floorplans/floorplan_1/userCols.xml
uart_test_ok_921/patmp/rx_test_917.data/netlists/netlist_1/nlh.xml
uart_test_ok_921/patmp/rx_test_917.data/netlists/netlist_1/top.edn
uart_test_ok_921/patmp/rx_test_917.ppr
uart_test_ok_921/planAhead.jou
uart_test_ok_921/planAhead.log
uart_test_ok_921/planAhead_run_1/planAhead.jou
uart_test_ok_921/planAhead_run_1/planAhead.log
uart_test_ok_921/planAhead_run_1/planAhead_run.log
uart_test_ok_921/planAhead_run_1/rx_test_917.data/floorplans/floorplan_1/iseloc.xml
uart_test_ok_921/planAhead_run_1/rx_test_917.data/floorplans/floorplan_1/pfi.xml
uart_test_ok_921/planAhead_run_1/rx_test_917.data/floorplans/floorplan_1/pfp.xml
uart_test_ok_921/planAhead_run_1/rx_test_917.data/floorplans/floorplan_1/userCols.xml
uart_test_ok_921/planAhead_run_1/rx_test_917.data/netlists/netlist_1/nlh.xml
uart_test_ok_921/planAhead_run_1/rx_test_917.data/netlists/netlist_1/receive.edf
uart_test_ok_921/planAhead_run_1/rx_test_917.ppr
uart_test_ok_921/receive.bgn
uart_test_ok_921/receive.bit
uart_test_ok_921/receive.bld
uart_test_ok_921/receive.cmd_log
uart_test_ok_921/receive.drc
uart_test_ok_921/receive.lso
uart_test_ok_921/receive.ncd
uart_test_ok_921/receive.ngc
uart_test_ok_921/receive.ngd
uart_test_ok_921/receive.ngr
uart_test_ok_921/receive.pad
uart_test_ok_921/receive.par
uart_test_ok_921/receive.pcf
uart_test_ok_921/receive.prj
uart_test_ok_921/receive.ptwx
uart_test_ok_921/receive.stx
uart_test_ok_921/receive.syr
uart_test_ok_921/receive.twr
uart_test_ok_921/receive.twx
uart_test_ok_921/receive.ucf
uart_test_ok_921/receive.udo
uart_test_ok_921/receive.unroutes
uart_test_ok_921/receive.ut
uart_test_ok_921/receive.v
uart_test_ok_921/receive.xpi
uart_test_ok_921/receive.xst
uart_test_ok_921/receive_guide.ncd
uart_test_ok_921/receive_map.map
uart_test_ok_921/receive_map.mrp
uart_test_ok_921/receive_map.ncd
uart_test_ok_921/receive_map.ngm
uart_test_ok_921/receive_map.xrpt
uart_test_ok_921/receive_ngdbuild.xrpt
uart_test_ok_921/receive_pad.csv
uart_test_ok_921/receive_pad.txt
uart_test_ok_921/receive_par.xrpt
uart_test_ok_921/receive_prev_built.ngd
uart_test_ok_921/receive_summary.html
uart_test_ok_921/receive_summary.xml
uart_test_ok_921/receive_usage.xml
uart_test_ok_921/receive_wave.fdo
uart_test_ok_921/receive_xst.xrpt
uart_test_ok_921/rx_summary.html
uart_test_ok_921/rx_test_917.gise
uart_test_ok_921/rx_test_917.ise
uart_test_ok_921/rx_test_917.ntrc_log
uart_test_ok_921/rx_test_917.xise
uart_test_ok_921/rx_test_917_pa.log
uart_test_ok_921/rx_test_917_pa_ports.v
uart_test_ok_921/rx_test_917_xdb/cst.xbcd
uart_test_ok_921/rx_test_917_xdb/tmp/ise/version
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/HDProject/HDProject
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/HDProject/HDProject_StrTbl
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/__stored_object_table__
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/PnAutoRun/Scripts/RunOnce_tcl
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/PnAutoRun/Scripts/RunOnce_tcl_StrTbl
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main/dpm_project_main
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main/dpm_project_main_StrTbl
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/CSourceProcessView
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/CSourceProcessView_StrTbl
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/CViewSelector
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/CViewSelector_StrTbl
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/File-SynthesisOnly
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/File-SynthesisOnly_StrTbl
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Library-SynthesisOnly
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Library-SynthesisOnly_StrTbl
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Process-BehavioralSim-DESUT_VERILOG
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Process-BehavioralSim-DESUT_VERILOG_StrTbl
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Process-SynthesisOnly-
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Process-SynthesisOnly-DESUT_UCF
uart_test_ok_921/rx_test_917_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Process-SynthesisOnly-DESUT_UCF_StrTbl
uart_test_ok_921/rx_test_91

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