MIPS 指令集，比see mips 更适合用作手册使用-This appendix describes the instruction set architecture (ISA) for the central

processing unit (CPU) in the MIPS IV architecture. The CPU architecture defines

the non-privileged instructions that execute in user mode. It does not define

privileged instructions providing processor control executed by the

implementation-specific System Control Processor. Instructions for the floatingpoint

unit are described in Appendix B.