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文件名称:51-DDS

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [C/C++] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    2.08mb
  • 已下载：
    0次
  • 提 供 者：
    张****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

不仅包含FPGA源码还包含51单片机控制源码，已经实现DDS功能，绝对原创。-Includes not only the FPGA source code also includes a 51 SCM control source, has been achieved DDS functions, absolutely original.
相关搜索： DDS 单片机 VHDL 51 DDS 单片机

(系统自动生成,下载前可以参看下载内容)

下载文件列表

51-DDS/DDS/12232.h
51-DDS/DDS/1302.h
51-DDS/DDS/ADDA.h
51-DDS/DDS/DDS.c
51-DDS/DDS/DDS.h
51-DDS/DDS/DDSconfig.c
51-DDS/DDS/DDSconfig.h
51-DDS/DDS/key.bmp
51-DDS/DDS/Key.h
51-DDS/DDS/ReadRam.h
51-DDS/DDS/Res.h
51-DDS/DDS/Serial.h
51-DDS/DDS/STARTUP.A51
51-DDS/DDS/STARTUP.LST
51-DDS/DDS/STARTUP.OBJ
51-DDS/DDS/work
51-DDS/DDS/work.c
51-DDS/DDS/work.h
51-DDS/DDS/work.hex
51-DDS/DDS/work.lnp
51-DDS/DDS/work.LST
51-DDS/DDS/work.M51
51-DDS/DDS/work.OBJ
51-DDS/DDS/work.Opt
51-DDS/DDS/work.plg
51-DDS/DDS/work.Uv2
51-DDS/DDS/work_Opt.Bak
51-DDS/DDS/work_Uv2.Bak
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/add_sub_1ge.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/add_sub_1me.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/add_sub_3eh.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/add_sub_4eh.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/add_sub_4le.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/add_sub_7ie.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/add_sub_ahe.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/add_sub_aug.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/add_sub_die.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/add_sub_dtg.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/add_sub_ghe.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/add_sub_jle.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/add_sub_mke.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/add_sub_rch.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/add_sub_uge.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/altsyncram_nk31.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/altsyncram_ok31.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/altsyncram_pk31.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/altsyncram_qj31.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/altsyncram_qk31.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/altsyncram_rj31.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/altsyncram_rk31.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/altsyncram_sj31.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/altsyncram_tj31.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/altsyncram_uj31.tdf
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(0).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(0).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(1).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(1).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(10).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(10).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(11).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(11).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(12).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(12).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(13).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(13).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(14).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(14).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(15).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(15).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(16).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(16).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(17).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(17).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(18).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(18).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(19).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(19).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(2).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(2).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(20).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(20).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(21).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(21).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(22).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(22).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(23).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(23).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(24).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(24).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(25).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(25).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(26).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(26).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(27).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(27).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(28).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(28).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(29).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(29).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(3).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(3).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(30).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(30).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(31).cnf.cdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(31).cnf.hdb
51-DDS/DDS-51-FPGA/DDS-51-FPGA/DDS-2/db/DDS-2.(32).cnf.cdb
51-

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