搜索资源列表
AEScoremodules
- AES decoder aes_dec.vhdl AES encoder aes_enc.vhdl Package used by rest of design aes_pkg.vhdl Key Expansion component for AES encoder and decoder key_expansion.vhdl -AES AES encoder decoder aes_dec.vhdl aes_ enc.vhdl Package used by rest
aes_encryption
- aes加密算法的VHDL代码实现，在FPGA芯片上调试过
xor_mul
- 使用列表法，VHDL语言实现的基于多项式基的有限域乘法器，用于AES算法等对有限域乘法有要求的算法
VHDL_AES_ZigBee
- 用VHDL实现的ZigBee模块控制算法以及AES加密算法，用于Xilinx的FPGA!-With the realization of VHDL ZigBee module control algorithm and AES encryption algorithms for Xilinx FPGA!
FPGA
- 此课件是基于FPGA的加密芯片设计实例，DES的FPGA实现，包括DES加密算法简述，DES的伪代码描述，设计流程，运算电路模型设计，算法程序设计 -The courseware is based on the FPGA chip design example of encryption, DES for FPGA implementation, including the DES encryption algorithm briefly, DES pseudo-code descr ipt
63535312DCTofJPEG
- 用verilog代码实现JPEG压缩编码过程中的DCT模块，用移位加法实现了乘法-Verilog code using JPEG compression encoding process to achieve the DCT module, with the shift to achieve the multiplication addition
ebiu_ctl
- VHDL语言编写的外总线控制器，带有aes加密模块-VHDL language external bus controller, with aes encryption module
AES_enc_core_tb
- this code discribers testbench for aes algorithm. it is written by .vhdl
AES_N
- AES encryption algorithm for VHDL implementation, it is very useful and tested on sp3 kit
Advanced-Encryption-Standard-(AES)
- AES decryption standards, vhdl code
IJCSI-9-4-3-354-360_2
- fpga the aes algorithme by using vhdl
aes
- 此程序完成aes的硬件语言实现部分，通过vhdl语言完成加解密过程。-This process is complete aes hardware language section, vhdl language to complete the encryption and decryption process.
dec_aes
- decription aes vhdl code for fpga
aes_-vhdl
- aes encription coding in vhdl language
Project
- 基于FPGA的AES算法的VHDL实现，低内存模式-aes vhdl code
Advanced Encryption Standard
- AES algorithm implementation in VHDL
AES-Encryption-VHDL-master
- AES Encryprtion an decryption algorithm
AES-FPGA
- 本文介绍了AES加密算法通过不同的功能结构的FPGA实现，语言背景为VHDL-This paper details Implementation of the Encryption algorithm AES under VHDL language In FPGA by using different architecture of mixcolumn. We then review this research investigates the AES algorithm in FPGA
AES-algoritghm-code
- VHDL code for AES 128bit encryption
avs_aes_latest
- This is source code for something very important that is AVS AES standard hardware code for implementation both ASIC and FPGA