搜索资源列表
Cyclone4_SD_Card_Audio_Player
- 基于cyclone4 FPGA芯片的音频播放器完成项目工程,包括SOPC项目代码,以及SD卡读取模块Verilog IP,以及完整的Q2下项目工程。-Cyclone4 FPGA chip based audio player to complete the project works, including the SOPC project code, and SD card reader module IP, as well as complete Q2 next project.
DE1-verilog
- Altera公司推出最新开发板DE1。该资料为DE1的FPGA 代码,包括ADC,音频处理,视频输出等,供大家参考使用。-Altera Corporation introduced the latest development board DE1. The data for the DE1 FPGA code, including the ADC, audio processing, video output, etc., for your use and reference.
audio_fft_vga
- 代码使用Verilog HDL实现了使用WM8731对音频进行采样,并且使用ALTERA FPGA实现了频谱计算(FFT),在VGA上显示频谱。-Achieved using the Verilog HDL code using WM8731 audio sampling, and use ALTERA FPGA to achieve the calculated spectrum (FFT), shows the spectrum on VGA.
DE2_SD_Card_Audio
- 使用Quartus Ⅱ与 NIOS Ⅱ IDE。 功能要求:(可实现某几项或全部) 1. 支持SD卡文件读取; 2. 支持WAV或MP3或其他格式音频,如为压缩格式则需解压缩; 3. 歌曲名称LCD显示; 4. 支持“播放/暂停”控制功能; 5. 支持“前一首”功能; 6. 支持“下一首”功能; 7. 支持LED灯显示音量功能; 8. 支持复位功能; 9. 支持硬启动,FPGA码流文件和软件二进制文件写入ROM,从ROM启动; 10. 支持总歌曲数和第
DE2_SD_Card_Audio(quartus-9.0)
- 本代码为Altera DE2开发板例程源码(EP2C35F672C6),quartus II 9.0以上版本均可编译(随板光盘为quartus II 7.2版在9.0以上版本上编译会报错)。本工程实现SD的音频播放器,即通过FPGA控制SD卡,读取SD的音频文件,通过WM8731进行播放。-In this demonstration we show how to implement an SD Card Music Player on the DE2 board, in which th
DE2_TV
- 本代码为Altera DE2开发板例程源码,(FPGA:EP2C35F672C6)quartus II 9.0以上可以编译(随板源码为7.2以下版本,在9.0以上版本编译会报错)。本代码实现一个音视频播放器TV_BOX。-This demonstration plays video and audio input a DVD player using the VGA output and audio CODEC on the DE2 board. There are two major bl
audioVHDL
- FPGA_Audio - project to implement and demonstrate audio on FPGA Using VHDL
DE1_Audio_AdcDac
- FPGA DE1 AUDIO ADC/DAC CODE
FFT
- 基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核,实现了基于FFT的音频信号分析-Altera Cyclone II FPGA family based embedded high-performance embedded IP core (Nios) soft core processor to achieve a FFT-based audio signal analysis
DE1_SoC_Audio
- 声音录制、播放的Verilog代码,用于Altera Cyclone V SOC. 写时适配的是DE1-SOC开发板。-Audio recording and playing code for Altera Cyclone V SOC FPGA. Code was designed for DE1-SOC development board, but could be reference for other boards.
codec_ctrl.vhd
- codec controller for fpga design, audio synthesizer, vhdl
top_level.vhd
- vhdl code for top level fpga, audio synthesizer
Zynq-Mini-ITX-Rev-E
- Zynq Mini-ITX 单芯片可编程SOC(ARM+FPGA)开发板电路原理图 -Zynq Mini-ITX Development Board Schematics the Zynq Mini-ITX development board features 2 GB DDR3 SDRAM, PCIe Gen2 x16 Root Complex slot (x4 electrical), SATA-III interface, SFP interface, QSPI Flash me
NIOSII_VGA_Controller
- Nios II VGA Controller with DMA The Nios II VGA Controller with DMA is an SOPC Builder component which can be added to any SOPC Builder system to provide VGA display capability. The controller is capable of displaying the following resolutions
aes3_rev1.0
- AES3在altera FPGA上开发的参考案例-AES3 Reference Design v1.0 The AES3/EBU reference design provides both a transmitter and a receiver. The receiver extracts the data and the clock an incoming AES3/EBU stream and stores the parallel audio data and
si3000
- Verilog code for control ICs SI3000 audio coder on FPGA
experimental-electronic-music
- 1、 了解普通扬声器的工作原理。 2、 使用FPGA产生不同的音乐频率。 3、 进一步体验FPGA的灵活性。 - AUDIO experimental electronic music
Soc_Audio_v5
- DE1 audio soc,xue xi audio process by Altera soc FPGA-DE1 audio soc
audio_verilog
- AUDIO音频模块AN831的录音及播放FPGA代码,测试通过-AUDIO audio module AN831 recording and playback of FPGA code, the test passed
streetlights-based-on-VHDL
- 本程序设计了一个基于FPGA的路灯控制系统,具有时控、声光控、交通控制的功能,即不但可通过对系统人工设定开关灯时间来完成其工作,也可通过采集实际环境的光信号和声音信号来控制路灯工作,还可以通过交通状况控制;此外可以通过故障检测功能,实现对路灯的故障检测,并且可以由七段数码管显示故障路灯编号;同时,利用热敏电阻等器件组成外部电路,用来检测电路温度,此电路具有报警功能,保证系统在正常温度范围内工作。在交通状况控制模式下,利用红外传感器探测目标位置,进而确定输出高低电平。在仿真模拟中结果正确,实现了