搜索资源列表
LABVIEW.Simulation.Interface.Toolkit(for.LabVIEW.7
- NI LabVIEW7.1的仿真接口工具包。 连接LabVIEW用户界面和在MathWorks.公司的Simulink® 软件中运行的仿真模型 NI LabVIEW能够与Simulink软件开发出的模块交互 将模型连至实时I/O, 实现建模、部署、HIL仿真 通过基于配置的对话, 轻松添加数据采集、CAN和FPGA I/O 借助多通道数据配置, 将激励应用于模型 以通道为单位指定多速率数据采集, 优化文件大小和应用性能 -NI LabVIEW7.1 the Simu
videofpga
- 利用FPGA进行运动检测的论文，思想不错，可以借鉴-Motion Detection using FPGA for the papers, thinking well, can learn from
VGA
- 用fpga实现vga的显示，很好的。能用。分辨率可达1024*680-Using FPGA to achieve vga display, very good. Can be used. Resolution up to 1024* 680
dianti
- vhdl代码： 电梯控制器程序设计与仿真！初学fpga者可以参考参考！！比较简单-VHDL code: Elevator controller design and simulation program! FPGA beginner who can refer to reference! ! Relatively simple
timer
- vhdl代码：电子时钟VHDL程序与仿真！初学fpga者可以参考参考！！比较简单-VHDL code: electronic clock and simulation of VHDL procedures! FPGA beginner who can refer to reference! ! Relatively simple
IPOFPIC
- pic单片机的源代码,基于此IP核可以自己修改单片机的外围设备,并在此基础上开发自己的单片机.-SCM pic source code, based on this IP core can modify MCU peripherals, and on this basis to develop their own single-chip microcomputer.
PS2Fpga
- PS2开发源代码，取自于FPGA开发板，可直接应用于实际项目中-PS2 development of source code, derived from FPGA development board can be directly applied to actual projects
RS232_pro
- RS232 verilog coding 全参数化设计 可以自己设定波特率 时钟频率等 完全FPGA实现调通-RS232 verilog coding the entire parametric design can set the baud rate clock frequency of FPGA to achieve complete transfer pass
uart_fpga
- 一个完全好用的程序,用ISE 8.2打开就可直接应用-A fully-to-use procedures, with ISE 8.2 can be applied directly to open
FPGA27examples
- FPGA有价值的27例，通过学习这些例子可以快速掌握FPGA设计流程-27 cases of valuable FPGA, through the study of these examples can quickly grasp the FPGA design flow
sha_core
- 安全散列函数的VERILOG实现，通过了fpga验证，在系统正可以直接当IP盒应用-Secure Hash Function VERILOG achieve, through the FPGA verification, the system is can be directly applied when the IP box
dds_new
- 驱动时钟加入了PLL,使得DDS的驱动时钟可变.32位的NCO使得DDS的分辨率可以做到Hz量级-Clock driver joined the PLL, the DDS makes the clock-driven variable-.32-bit NCO makes the resolution of DDS can be done Hz magnitude
cpld-ppt
- CPLD入门知识，老师的课件！希望可以对大家有所帮助。-CPLD Starter knowledge, the teacher s courseware! I hope we can be helpful.
FPGA_jiaocheng_yu_shiyan
- 最重要的是七个从简单到复杂的实验，包括：基础实验一_FPGA_LED 基础实验二_seg7实验以及仿真 基础实验三_SOPC_LED 基础实验四_Flash烧写 基础实验五_定时器实验 基础实验六_按键以及PIO口中断实验 实验七_网卡使用 ，这些实验室用到了SOPC BUILDER 与NOIS ii ,使用Verilog 编写，有实验板和没有实验板的都可以用来学习。 其次还包括： FPGA开发板各存储器之间的联系、 多处理器文档 、 USB_UART等文档，很好用的文档，您下了相信不会后悔！-
ASIC_and_FPGA_Verification
- ASIC/FPGA验证经典资料，英文版，希望大家可以有所借鉴。-ASIC/FPGA verification classic information, in English, I hope that we can learn from there.
fpgapeizhi
- fpga 配置方式 转载的大家看看吧还可以的-reproduced FPGA configuration can also take a look at the bar of
DDR_SDRAM
- 利用fpga读写ddr的源代码 实测可以使用-Ddr use FPGA to read and write the source code can use the measured
sin.tar
- 神奇的sin波生成verilog源码，非常简单的代码无需乘法即可生成sin,cos，值得搞算法的人借鉴-Magic sin wave generated Verilog source code, the code is very simple multiplication can be generated without sin, cos, worthy people from engaging in algorithm
FPGA
- FPGA设计全流程.大家可以参考参考哦,可能对大家有所帮助哦-The entire FPGA design flow. Everyone can refer to reference Oh, may be helpful to everyone, oh
AD9956
- 直接频率合成器 (DDS)ad9956 单点频功能程序，用于c51单片机控制ad9956,程序为设置70M点频，用户设置不同频控码，即可设置不同频率。 -Direct frequency synthesizer (DDS) ad9956 frequency function of a single point of procedure, for the C51 single-chip control ad9956, procedures for the establishment of 70