搜索资源列表
DDS
- FPGA基于FPGA的DDS设计verilog程序-FPGA DDS project verilog procedure
dds
- 已实际测试 FPGA 实现 DDS程序-FPGA DDS
dds
- 基于FPGA的DDS程序代码,实现的功能强大可以输正弦波,三角波,方波等波形,并且频率可以调节。实现对应的功能强大。-FPGA-based DDS program code can achieve powerful output sine wave, triangle wave, square wave waveform and frequency can be adjusted. Implement corresponding powerful.
DDS
- 基于FPGA完成2001年电子设计竞赛直接数字频率合成器,有FPGA部分、MSP430程序以及相互通信的程序,完成题目全部要求-FPGA-based Electronic Design Competition 2001 complete direct digital frequency synthesizer, there is part of the program FPGA, MSP430 procedures and communicate with each other, to comp
DDS
- FPGA实现三通道DDS信号源Verliog程序-FPGA to achieve three-channel DDS signal source Verilog program
dds
- 这是一个基于FPGA设计的DDS信号发生器设计。能够生成正弦波\ASK\PSK\AM\FM等波形。-This is an FPGA design of DDS signal generator based on. Capable of generating sine \ASK\PSK\AM\FM and other waveforms.
DDS(ok)
- 制作ROM正弦表并填充FPGA内部ROM,通过调用内部数据实现正弦波输出,开发环境quartusii , 语言verilog , 调试通过 , 附有modelsim调试结果。-Make ROM sine table and fill the ROM internal FPGA, by calling the internal data to achieve the sine wave output, development environment QuartusII, Language Veri
DDS
- FPGA DDS的控制,可以用modelsim直接仿真,观察信号。-DDS of FPGA,able to simulate with modelsim and check the signal
dds
- FPGA产生dds正弦信号,基于quartus-FPGA generate dds sine signal, based on quartus
DDS
- 基于FPGA,Verilog语言编写的DDS信号发生器,可生成方波、正玄波,三角波。-Based FPGA, Verilog language DDS signal generator that generates a square wave, sine wave, triangle wave.
DDS
- 用FPGA实现DDS,代码测试正确,可用于初学者学习使用-FPGA with DDS, code testing is correct, can be used for beginners to learn to use
DDS
- 基于FPGA的任意波形信号发生器,可实现频率、幅度、相位的调节,输出方波、正弦波、锯齿波-Arbitrary waveform generator based on FPGA
dds1
- 通过FPGA实现的,dds数字信号发生器,可产生正弦波,方波,锯齿波,三角波(DDS digital signal generator through FPGA, DDS digital signal generator, can produce sine wave, square wave, sawtooth wave, triangle wave)
src
- 使用FPGA+DAC产生DDS,可变频率(user FPGA and DAC generate DDS)
F0501
- 汽车VCU控制器测试工装的程序,STM32单片机扩展总线读写FPGA内部RAM,DDS方式产生PWM,PWM频率,脉宽测量功能(Automotive VCU controller test tooling procedures, STM32 microcontroller expansion bus read and write FPGA, the internal RAM, DDS way to generate PWM, PWM frequency, pulse width measurem
cordic
- 使用verlog语音实现cordic 算法,在DE2 115平台上已验证。(Implementation cordic algorithm)
ex_DDS
- 基于Verilog语言实现DDS(数字频率合成器)的设计,有完整的工程设计代码和仿真脚本(Verilog language based on DDS (digital frequency synthesizer) design, there is a complete engineering design code and simulation scr ipts)
NCO
- 一种基于FPGA的数控振荡器技术的实现方法(FPGA implementation of NC oscillator NCO)
dds6_ise12migration
- 以DE2为开发平台,采用Veriolg语言编程,实现了DDS信号输出,频率,步进,波形输出均可调,采用Modelsim以及FPGA内嵌逻辑分析仪验证设计的正确性,可以满足一定的工程需求。(With DE2 as the development platform and Veriolg language programming, the DDS signal output, frequency, step and waveform output can be adjusted. The corre
signal
- 简易频谱仪 256位 采用了直接数字频率合成技术(DDS)和计算机控制技术,选择美国Analog Devices公司的高度集成DDS芯片AD9851和AT89S52单片机作为控制器件,设计了一种基于DDS的程控信号发生器。用C语言进行了软件应用设计。实验结果表明,该信号发生器能较好地产生较高稳定度的激励信号,具有较高的实用价值。(Simple spectrum meter 256 bit)