搜索资源列表
comp1
- 实现了加密狗的功能,完成此功能用的硬件描述语言,verilog hdl 在各方面是最好的,欢迎下载。-fpga aes
music
- verilog HDL编写的文件,实现音乐播放,FPGA为EP2C8Q208C8N,编译通过,详细内容参考代码。-verilog HDL documents prepared, the music player, FPGA to EP2C8Q208C8N, compile, details reference code.
hdl
- ACTEL FPGA 6位数码管计数999999,Verilog描述-ACTEL FPGA 6 bits digital tube count 999999, Verilog descr iption
music
- 用FPGA实现的歌曲“梁祝”播放程序,用Verilog HDL编写-FPGA implementation with the song " Butterfly Lovers" player, written with Verilog HDL
altpcie_64b_x8_pipen1b
- PCIE的软核程序,基于Verilog HDL语言,应用于FPGA的高级编程应用中。-PCIE soft nuclear program, based on Verilog HDL language, used in high-level FPGA programming applications.
PLL_50MHz_to_12MHz
- Verilog HDL语言编写EP2C8Q208芯片PLL分频的简单程序,50MHz分频为12MHz-Verilog HDL language,EP2C8Q208 chip, PLL frequency of simple procedures, 50MHz to 12MHz frequency
VGA_char_ROM_success
- Verilog HDL语言编写的基于M4K块配置ROM的字符数据存储VGA显示实验代码,引脚分配适用于21EDA的EP2C8Q208开发板, 详细解说请参见特权同学《深入浅出玩转FPGA》视频教程中的《Lesson30:SF-EP1C开发板实验9——基于M4K块配置ROM的字符数据存储VGA显示实验》-experimental code written in Verilog HDL language,ROM configuration based on M4K block for the cha
RTC
- actel fpga开发板fusion startkit实验例程,包含完整工程文件几verilog HDL 源码-actel fpga development board fusion startkit test routines, including the complete works of several verilog HDL source file
VGA
- 应用VEROLOG HDL编写的VGA的IP核,可用于SOPC BUILDER中-the control of the i2c bus
farrow
- 一份很好的数字时延程序(采用farrow算法),采用Verilog HDL,经过测试通过,是我一个雷达项目中的代替模拟时延的。精度很高,并有MATLAB程序验证-A good digital delay, Verilog HDL, procedures, is my test through a radar simulation project instead of the delay. Precision is high, and MATLAB validation
verilog-study
- VERILOG HDL的入门学习资料,对于想进一步学习FPGA的朋友有一定的帮助。-VERILOG HDL entry-learning materials, for those who want to learn more FPGA' s friends have some help.
FPGA-Introduction
- 简单介绍Verilog HDL语言和仿真工具,主要应用领域,了解Verilog 的发展历史 -Brief introduction to Verilog HDL language and simulation tools, the main application areas to understand the historical development of Verilog
synth_fft
- fftprocessing can complete 256 pointsFFT.-Hardware Descr iption Language(HDL)is an advanced electronic designmethod.After HDL was put into use,it has draw great attention and gained popularity.The design used Verilog HDL and Schematic for entry tools
Nios_Example_07_SD_35TFT
- 这是一个nios工程,控制TFT液晶屏的程序。FPGA平台用Verilog HDL语言编写的,MCU软核程序有C语言编写。通过这一个完成的工程,你就会明白SOPC的一些实现方法。-This is a nios engineering, control TFT LCD screen program. The FPGA platform Verilog HDL language preparation with the nuclear program has a soft, MCU written
Verilog-HDL-jiaocheng
- verilog 教程,里边有很多个verilog学习方面的教程,有开发板自带的一些,还有些是本人自己收集整理的,很实用,也适合FPGA爱好者,很不错。-verilog tutorials inside many a verilog tutorial learning, development board comes with some, and some is my own collated, it is practical, but also for FPGA enthusiasts, ver
RScoder
- 基于FPGA的RS编码器设计,verilog hdl语言。-RS encoder FPGA-based design, verilog hdl language.
design-of-CAN-based-on-VHDL
- 基于Verilog+HDL设计CAN控制器,详细介绍各功能模块的设计。本论文的重点是CAN总线通信控制器的前端设计。即用Verilog HDL语言完成CAN协议的数据链路层的RTL级设计,实现其功能,并且能够在FPGA开发平台Quartos上通过仿真验证,证明其正确性-Verilog+ HDL-based design of CAN controller, detailed design of each functional module. This paper focuses on the C
FPGA-verilog-fenpin
- FPGA最常用的功能,分频,利用verilog HDL语言实现的,非常适合初学者。-FPGA most commonly used functions, frequency, using verilog HDL language, and is ideal for beginners.
div_frequency
- 任意分频器,用Verilog HDL实现,只需修改参数可以实现奇数、偶数分频,FPGA应用必备资料。-Any divider, using Verilog HDL to achieve, simply modify the parameters can be achieved odd, even frequency, FPGA applications necessary information.
jing-dain--FPGA-cheng-xu
- 关于FPGA的经典算法,包括数码管的编程和显示,用Verilog HDL语言写的程序,在开发板上已经测试成功!-Classical algorithm on the FPGA, including digital programming and display, using Verilog HDL language to write programs, the development board has been tested successfully!