搜索资源列表
LCD1602_Verilog
- 1602液晶显示字符串..用FPGA来控制1602液晶显示.-1602 LCD display with a FPGA to control the string .. 1602 LCD.
LED
- verilog实现fpga easy030的led闪动-verilog，fpga easy030，led
music
- 用FPGA实现的歌曲“梁祝”播放程序，用Verilog HDL编写-FPGA implementation with the song " Butterfly Lovers" player, written with Verilog HDL
Verilog000
- FPGA的学习，熟悉QuartusII软件的各种功能，各种逻辑算法设计，接口模块(RS232,LCD,VGA,SPI,I2c等)的设计，时序分析，硬件优化等，自己开始设计简单的FPGA板子。 ③、NiosII的学习，熟悉NiosII的开发流程，熟悉开发软件(SOPC,NiosII IDE),了解NiosII的基本结构，设计NiosII开发板，编写NiosII C语言程序，调试板子各模块功能。-Verilog语言的学习，熟悉Verilog语言的各种语法。 ②、FPGA的学习，熟悉
altpcie_64b_x8_pipen1b
- PCIE的软核程序，基于Verilog HDL语言，应用于FPGA的高级编程应用中。-PCIE soft nuclear program, based on Verilog HDL language, used in high-level FPGA programming applications.
DDR2_controller
- DDR2控制器IP的设计与FPGA实现，使用verilog语言-DDR2 Controller IP Design and FPGA implementation, use the verilog language
dianticontrol
- 此源码为基于VERILOG的FPGA的电梯控制程序。-This source of FPGA-based VERILOG elevator control procedures.
I2C
- 此源码为基于FPGA的实现I2C总线协议的程序，程序中实现了AT24C02的芯片的读写。-The source code for the FPGA-based implementation of I2C bus protocol of the program, the program is implemented to read and write AT24C02 chip.
FPGA_FFT
- 基于IP核的FPGA FFT算法模块的设计与实现 在QUATUSII下实现-IP-based core module FPGA FFT algorithm design and implementation be achieved in QUATUSII
Verilog_testbench
- 介绍在FPGA广泛使用的Verilog语言以及如何编写高效的testbench，让仿真更加接近实际模型。-Introduction widely used in FPGA Verilog language and how to write effective testbench, so that a more realistic simulation model.
232543
- FPGA Implementation of QFT based Controller for a Buck type DC-DC Power Converter and Comparison with Fractional and Integral Order PID Controllers
lcd12864
- 用Verilog写得FPGA实现lcd１２８６４的控制程序，在Ｑｕａｒｔｕｓ环境下调试通过-Written using Verilog FPGA implementation lcd12864 control program, the debugging environment by Quartus
freq_counter(Verilog)
- 数字频率计FPGA代码，用verilog语言实现。-Digital frequency meter FPGA code with verilog language.
Realization_of_FPGA_for_LDPC_encoding
- 低密度奇偶校验码(简称LDPC码)是目前距离香农限最近的一种线性纠错码，它的直接编码运算量较大，通常具有码长的二次方复杂度．为此，利用有效的校验矩阵，来降低编码的复杂度，同时研究利用大规模集成电路实现LDPC码的编码．在ISE 8．2软件平台上采用基于FPGA的Verilog HDL语言实现了有效的编码过程，为LDPC码的硬件实现和实际应用提供了依据-Abstract：Low．density parity·check code(LDPC code)is a kind of linear eror
pwm
- PWM脉冲产生代码，程序采用VHDL硬件描述语言！很有参考价值-PWM pulse generation code, the program using VHDL hardware descr iption language! Useful reference
ps2andverilog
- 仿真已通过验证，并下载到FPGA实验板测试，大家可以下载来学习-Simulation has been validated, and downloaded to the FPGA test board test, you can download to learn ~~~~~
PLL_50MHz_to_12MHz
- Verilog HDL语言编写EP2C8Q208芯片PLL分频的简单程序，50MHz分频为12MHz-Verilog HDL language，EP2C8Q208 chip， PLL frequency of simple procedures, 50MHz to 12MHz frequency
i2c_verilog
- FPGA读写i2c的内部数据基于verilog语言的描述，按照内部时序访问-I2c data read and write the internal FPGA verilog language based on the descr iption, in accordance with the internal timing to visit
sfifo
- verilog编写的同步FIFO，功能仿真完全正确，大家可以参考下。-verilog write synchronization FIFO, functional simulation completely correct, we can refer to the next.
code
- 一个基于fpga的简单的实时心电检测系统，包括与pc通讯和qrs检测两部分-A simple fpga-based real-time ECG detection system, including communication with the pc and qrs detection of two parts