搜索资源列表
xapp1014_c5_GTP_SDI_RX
- Audio&Video Connectivity Solutions for Virtex-5 FPGAs
Xilinx_Altera_FPGAs
- Xilinx和Altera FPGAs的电源管理解决方案-Xilinx 和 Altera FPGAs power management solutions
FPGA-Channel-segmentation-design
- Channel segmentation design for symmetrical FPGAs.
Using_Embedded_Multipliers_in_Spartan-3_FPGAs
- 使用Spartan-3的嵌入式乘法器，VHDL语言-Using Embedded Multipliers in Spartan-3 FPGAs
tut_signaltapII_verilogDE2
- Altera公司原版设计手册，关于signaltap ii。-This tutorial explains how to use the SignalTap II feature within Altera’s Quartus R II software. The Signal- Tap II Embedded Logic Analyzer is a system-level debugging tool that captures and displays signals in
crossroute-R4
- As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstalk has primarily been a concern for ASICs, multi-chip modules, and
crossnoise-R5
- In recent years, due to rapid advances in VLSI manufacturing technology capable of packing more and more devices and wires on a chip, crosstalk has emerged as a serious problem affecting circuit reliability. Even though FPGAs are more immune
0123744385NanometerFPGAs
- low power design of nanometer fpgas
HDL_Chip_Design
- HDL Chip Design --- A Practical Guide for Designing, Synthesizing & Simulating Asics & Fpgas Using Vhdl or Verilog (EBook)
Rapid_System_Prototyping_with_FPGAs
- 《基于FPGA的快速建模》一本适合FPGA领域有一定基本经验读者的系统设计的佳作。-" FPGA-based rapid prototyping" a suitable FPGA has some basic experience in the field carry the tripod to make.
HighSpeedFIFOsInSpartan-IIFPGAs
- This application note describes how to build high-speed FIFOs using the Block SelectRAM+ memory in the Spartan™ -II FPGAs. Verilog and VHDL code is available for the design. The design is for a 512x8 FIFO, but each port structure can be chan
proposal_arv
- this initial stages of research on how to target kalman filters to FPGAs-this is initial stages of research on how to target kalman filters to FPGAs
The-Speedy-DDR2-Controller-
- The Speedy DDR2 Controller For FPGAs ERSA 2009 Final
SATA-Connectivity-solutions-for-Xilinx-FPGAs.pdf.
- This gives an overview over the Serial ATA (SATA) protocol and the implications when integrating SATA into an FPGA-based programmable system. Besides details of the different protocol layers, we will discuss the hardware and software components for b
Embedded-Processor-Block
- This reference guide is a descr iption of the embedded processor block in Virtex® -5 FXT FPGAs.
WCE2009_pp376-381
- A Simple Digital VHDL QPSK Modulator Designed Using CPLD/FPGAs for Biomedical Devices Applications
signaltapII_verilogDE2
- This tutorial explains how to use the SignalTap II feature within Altera’s Quartus R II software. The Signal- Tap II Embedded Logic Analyzer is a system-level debugging tool that captures and displays signals in circuits designed for implement
Design.warriors.guide.to.FPGA
- FPGA设计战士向导——FPGA设计开发人员的必读书籍，经典的让你跪着哭的书。强烈推荐-Design Warriors Guide to FPGAs
AFDX_Solutions_AN
- This application note begins with an overview of AFDX and ARINC 664. Following the overview is an explanation of how engineers could implement an AFDX-compliant interface (ARINC 664, Part 7) using Actel devices and intellectual property. Core10/1
verilog-programs
- These are first programs of my asic and fpgas lab.This folder contains simple half adder and its test bench using verilog language.Then it also contains 4 to 1 mux using two 2 to 1 muxes.Then its also has its test bench to check the code.These progra