搜索资源列表
uart_regs
- 串行通讯ip核，经过仿真验证，综合，可以参考使用-Serial communication ip nuclear, through simulation, synthesis, can refer to the use of
EDAMCS_51IP
- 基于EDA技术的兼容MCS_51单片机IP核设计,供参考设计-Based on EDA technology MCS_51 compatible single-chip IP-core design for the reference design
xapp529_6_1
- 一些有用的IP核，本人也是刚涉及FPGA到开发，特别希望前辈们能够共享一些关于图像处理方面的IP核-Some useful IP core, and I was just involved in FPGA to development, particularly the older generation to share some information about aspects of image processing IP core
xapp529_6_2
- 一些有用的IP核，本人也是刚涉及FPGA到开发，特别希望前辈们能够共享一些关于图像处理方面的IP核-Some useful IP core, and I was just involved in FPGA to development, particularly the older generation to share some information about aspects of image processing IP core
fpga_da
- 在测控系统中用IP核实现DA转换.doc-Measurement and control system used in the IP core to achieve DA conversion. Doc
AVR_Core
- 十五个免费的IP核大家可以尝试测试与修改，多多利用-15 free IP core that we can try to test and modify, make greater use of
memory_sizer.tar
- 硬件方面的源代码-有关IP核的，完全免费，大家要多多利用--Hardware source code- the IP core, completely free of charge, we have to make greater use of--
photo_verilog
- verilog开发的电子相册系统，是基于Altera的FPGA芯片和IP核的设计！-Verilog developed electronic album system is based on Altera s FPGA chip and IP core design!
AltrFir32
- 借助于altera公司的IP核，在FPGA中使用dspbuilder实现32位低通FIR滤波器功能，-Altera With the company
8086IP
- 开源CPU软核8086的源码,波兰版Verilog源码-8086 soft-core CPU revenue source, the Polish version of Verilog source code
dds_using_FPGA
- 利用FPGA实现DDS经过编译没有错误。编译环境为QuartusII7.2，该环境集成了IP核，可以提高开发效率。-FPGA realization of the use of DDS compiled no errors. Compiler environment QuartusII7.2, the environment integrated IP core, can improve the development efficiency.
15Altera_IP
- 里面包含15个altera的IP核的源代码,包括I2C，UART，VGA_SYN-Which contains 15 nuclear altera the IP source code, including I2C, UART, VGA_SYN
fftipcore
- 实现fft的ip核，用vhdl语言实现。-Fft realize the ip nuclear, using VHDL language.
VERILOG_VERSION_PIC16C57
- VERILOG VERSION PIC16C57 是一个用于FPGA模拟PIC16C57的IP核，有帮助文件，介绍了如何测试使用这个IP核。用VERILOG语言编写的。-VERILOG VERSION PIC16C57 is a PIC16C57 for FPGA simulation of the IP core, has helped document describes how to test the use of the IP core.
bluetooth.tar
- 蓝牙的一个ip RTL 核，不知道对大家有没有用？谢谢。-this is an IP core of blutooth.
ip_core1
- 用于fpga的sopc的ip核，是学习ipcore编码的好教程-For the FPGA of the SOPC ip nuclear, IPCore study are a good encoding tutorial
SOPC1
- 随着微电子技术和计算机技术的发展，可编程逻辑器件、EDA技术、嵌入式系统、SOC、SOPC、IP核等新概念和新技术层出不穷，新技术的应用迅速渗透到电子、通信、信息、机械制造、仪器仪表、航空航天、汽车电子、家用电器等领域，有力地推动了社会生产力的发展和社会信息化程度的提高。本设计以应用SOPC技术为目的，进行了图像处理和图像传输系统的设计。-With the micro-electronics technology and computer technology, programmable log
M4
- NIOSII的液晶显示ip 核，含有所有底层源代码-Ip of the liquid crystal display NIOSII nuclear, containing all underlying source code
9_fft
- 利用FPGA的IP核来实现fft的设计-The use of FPGA to realize the IP core design fft ,,,,,