搜索资源列表
opb_vga.EDK下的用户IP核
- 一个EDK下的用户IP核，进行OPB总线到VGA的转换,EDK under a user IP core, the OPB bus to VGA conversion
USB.rar
- 用VHDL实现的USB IP核，大家可以参考下,Use VHDL to achieve USB IP core, we can refer to the following
pwm_avalon_interface.rar
- 这是一个完整的pwm ip 核，可在sopc中实例化该核，下载即可用，绝对好使。,This is a complete nuclear pwm ip can be instantiated in SOPC in the nuclear, you can download, and absolutely so.
USB2.0IP.rar
- 完整的用VERILOG语言开发的USB2.0 IP核源代码,包括文档,Complete Verilog language developed by USB2.0 IP core source code, including documentation
PWM_LED.rar
- 基于ALTERA公司NIOSII的LED灯控PWM IP核设计,ALTERA-based company controlled NIOSII the LED lamp PWM IP-core design
FFT-IP.rar
- 在FPGA上实现的fft，里面是一个fft的ip核，直接可以用，编译通过，能正常运行,In the FPGA to achieve the fft, there is a nuclear fft of ip, can be used directly, the compiler is passed, to the normal operation of
IPcore
- 基于EP3C25的Altera SDI IP核的使用-EP3C25 Altera SDI IP
VERILOG-USB2.0IP-core
- 完整的用VERILOG语言开发的USB2.0 IP核源代码，包括文档、仿真文件-VERILOG language with a complete development of USB2.0 IP core source code, including files, simulation files
uartvhdl
- VHDL语言实现的UART IP核，比较实用-VHDL language to achieve the UART IP core, more practical
ARMcore
- 基于FPGA的ARM IP核！该软核VHDL源码全部开放-FPGA-based ARM IP core! The soft core VHDL source code are all open
pwm
- 在Quartus 9.0 下实现的PWM IP核设计，周期占空比均可调。-PWM IP core design,which period and duty is adjustable.
pci_core.tar
- vhdl 写的 PCI IP核程序，已经过测试-pci ip core
usb_funct[1].tar
- usb2.0的IP核，可在QuartusII或MaxPlusII环境下实现编译和生成ip核-usb2.0 IP nuclear, QuartusII or the environment under MaxPlusII compile and generate nuclear ip
29becbce-7f76-454c-9f85-fb6138f83375
- cpu IP 核设计的verilong代码-cpu IP core design code verilong
SOPCVGAIP
- 基于sopc的vga ip核设计参考文档-Based on SOPC vga ip-core design of the reference documentation
OpenCorespcicore
- PCI IP核功能实现，符合V2.2协议-realize pci function
dsp_core
- 可用于FPGA的DSP IP核，嵌入式必备-Can be used for FPGA-DSP IP core, embedded essential
USB_IP
- 介绍了采用FPGA实现USB2.0 IP核的详细方法和步骤以及仿真方法-This paper introduces an FPGA to achieve the USB2.0 IP core in detail the methods and steps as well as the simulation method
tes_amp_80_0314
- 基于dsp builder的数字下变频器，IP核做的-digital down converter,degigned in matlab
8086
- 基于FPGA的8086/8088 IP核-8086/8088 FPGA IP Core