搜索资源列表
alter_ip_source_code
- 15个altera的ip的源码,对于altera ip核的研究有很大帮助-15 altera of the ip source, for the study of nuclear altera ip of great help to
Ipcoredesign
- 微电子/软硬IP核设计：IP核脚本指南，模型开发指南-Microelectronics/soft and hard IP core design: IP core scr ipting Guide, Model Development Guide
FFT
- IP核！！高速傅立叶变换的VHDL源代码 可以综合-IP core! ! High-speed Fourier transform of the VHDL source code can be integrated!!
d
- IP核应用，详细的介绍了关于FPGA中IP核的应用-IP core application, a detailed presentation on the application of FPGA in the IP core ,,,,,,
QuartusII-free-of-charge-to-use-IP-Core
- 本文详细的介绍了QuartusII中免费IP核的使用方法-This paper introduces QuartusII free of charge to use IP Core
xge_mac
- 10G MAC ip核源码其中包含了三个版本。经过测试正确无误。-======================== 10GE MAC Core ======================== ------------------------ 1. Directory Structure ------------------------ The directory structure for this project is shown below.
MC8051
- 摘要:分析了与标准8051 MCU 兼容的MC8051 IP 核结构原理与设计层次，详细论述了MC8051 IP 核的FPGA 实现与 应用方法。通过试验验证，其性能比标准8051 MCU 高，方便与系统其他模块的集成。在各种嵌入式系统和片上系统 中使用该IP 核具有重要意义。 关键词: 单片机； MC8051； IP 核； FPGA； VHDL-Abstract: This paper is compatible with standard 8051 MCU MC8051 IP c
Altera_IPcore
- 15个Altera ip核，大家可以相爱在使用-15 Altera ip
pc_cfr_v2_0_msim_r2_0
- Xilinx公司pc_cfr IP核的MatLab仿真-matlab simulation model of pc_cfr ip core of xilinx
fftip
- 2008-2009年优秀硕士论文之：基于FPGA的高性能32位浮点FFT IP核的开发-Outstanding Master' s thesis 2008-2009: FPGA-based high-performance 32-bit floating-point FFT IP core development
fpga-jianpan-ip-core
- 基于fpga的键盘设计ip核的vhdl源代码-Ip fpga design of the keyboard based on the vhdl source code for nuclear
ethernet10-100M-IP-core
- 以太网10-100M IP核Verilog源码，可综合-Ethernet 10-100M IP core Verilog source code can be integrated
USB-1.1-IP-CORE-VHDL
- USB1.1标准接口的IP核的实现和其设计实现的源码范例VHDL-USB1.1 standard interface IP core implementations and examples of their design and implementation of the VHDL source code
ise-ip-core
- IP核包括硬IP与软IP。调用IP核能避免重复劳动，大大减轻设计人员的工作量。-IP cores, including hard IP and soft IP. IP calls to avoid duplication of nuclear energy, thus greatly reducing the workload of the designer.
vga_lcd
- VGA/LCD控制 ip核，支持 CRT LCD,支持多种色彩方案。-VGA/LCD control ip core, support CRT LCD, supports a variety of color schemes.
vivado HLS开发教程
- 官方文档，与vivado HLS开发相关，介绍了HLS的特点和作用，即如何通过高级语言如C生成硬件描述语言，并生成IP核，方便FPGA开发。并给出了一些具体例程。
xapp1052
- ML605开发版 生成IP核的时候选择250MHZ pcie2.0 X4 5Gb/s 其他参考PDF文档。(When the ML605 development version generates the IP kernel, select 250MHZ pcie2.0 X4 5Gb/s Other reference PDF documents.)
microsemi
- microsemi的Libero IDE 软件内部IP核详解(Microsemi's Libero IDE software internal IP kernel details)
ip核
- 购买的beckoff公司的ip核，提供了详细的datasheet以及协议说明，附上调用ip核的文件，采用verilog编写，平台可以在ISE里自己设置(Buy the beckoff company's ip kernel, provides a detailed datasheet and protocol descr iption, attached to the ip kernel file, using verilog prepared, the platform can be set
ROM_test
- 使用quartus调用ROM的IP核，并生成激励文件进行仿真(Use the quartus call ROM IP kernel, and generate incentive files for simulation.)