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sanxiangsuoxiang
- 可实现电网相角的无静差跟踪，即实现锁相功能，可以在1到2个周期内实现锁相功能-PLL PHASE LOCK LOOP
GPS
- 导航仿真实验，包括锁频换，锁相环，伪码的产生，调制等，比较全。-Navigation simulation experiments, including locked exchange, PLL, pseudo-code generation, modulation, etc., more full.
PLL_test
- 基于DSP6713，对DSP内的锁相环相关的寄存器进行设置，实现锁相环倍频功能，DSP入门级资料。-Based on the DSP6713, the DSP phase-locked loops in the relevant register set, realization of PLL frequency multiplier function, DSP entry-level data.
pll-and-dq-transformation
- 三相锁相环和dq变换，用于电力系统中的网络同步-Phase locked loop and dq transform for power system network synchronization
74HC595--SPI-used-LED
- stm32通过spi口与74hc595相连，然后由74hc595控制8盏灯的闪灭，注意该工程所用外接高速晶振为12MHZ,而大部分板子为8M赫兹，使用时需要修改锁相环倍频系数。-stm32 through spi port is connected with 74hc595 and eight lights are ocontrolled by the 74hc595 , note that works with an external high-speed oscillator is 12M
PLL
- 频率源ad4350的配置源码 经过测试验证 能够锁定-Frequency source ad4350 tested configuration source verification can be locked
adf4250
- how to run pll adf4350
NE564D
- 基于NE564D锁相环频率合成器的设计，毕业设计来的-Based NE564D PLL frequency synthesizer design, graduate design come
test_pll_2
- 锁相环的verilog源代码，其中包括发送端，鉴相器，滤波器，压控振荡器的源代码，主要实现输入输出信号的跟踪，捕获和锁定，使输入输出信号在较短时间内达到同步。-This is a verilog code for PLL, including transmitor, PDF, Filter, VCO and so on. It mainly realize the input and output signal tracking, capture and lock, make the in
pll_reconfig_top1
- 该工程在QII里面仿真并且通过板上测试，可以通过动态配置PLL寄存器来获得你想要的时钟- it is very useful to get a dynamic clock through the reconfigure the PLL
adf4350
- adf4133锁相环程序，目前是输出固定的几个频点，如果想改成可以改频的，可以自己加个串口，自己定义协议即可-adf4133 PLL program, is currently a fixed number of output frequency, the frequency can be changed if you want to change, you can add their own serial ports, you can define your own protocol
PLL
- 三相数字锁相环pscad仿真 dq算法 PI控制-Three-phase digital phase-locked loop simulation in pscad
PLL_100M
- 实现pll分频功能倍频功能可得到fpga说需要的频率实现多的时钟输入-Multiplier pll divide function to achieve functionality available fpga said I need to achieve multi-frequency clock input
suoxianghaun
- 飞思卡尔单片机锁相环程序，详细说明了锁相环的配置步骤以及计算方法-Freescale MCU PLL procedures, a detailed descr iption of the PLL configuration steps and calculation methods
HMC830
- HMC830相关寄存器的配置,对于PLL编程的朋友有很大的帮助。-HMC830 related configuration register, the PLL programming friends a great help.
a
- PLL350锁相环源码，设置频率、分频比等等其他功能-PLL350 PLL source, set the frequency division ratio, etc. Other features
pll_test
- phase locked loop pll as fm demodulator
PLL_test
- 用于飞思卡尔XCB100的锁相环驱动程序-PLL for Freescale XCB100 drivers
PLL
- 31202 双路输出可以用的程序,测试通过-31202 can be used in the program
FBD
- 为了更好地进行谐波和无功功率的补偿与控制，叶FBD(Fryze一Buchholz一DPenbrock)法的定 义进行了完善，并给出了补偿电流检测的直接法和间接法，在三相电力系统中对FBD间接法进行 了推广研究，利用参考电压进行投影变换，不仅可以检测出功率电流和零功率电流，还可以检测出 基波有功电流、基波无功电流、谐波电流以及任意次谐波电流等，大大拓展了FBD法的应用范围和领域。MATI一AB仿真和实验结果表明了所定义和推广的电流检测方法的正确性和有效性。 -In order to