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ram4bit
- ram 4 bit with cpld, xinix & language is vhdl.
VHDL_Sample
- VHDL VGA彩条发射器,里面有4个文件,分别是直接输出的,还有通过ROM查找颜色的,通过RAM和DRAM的-VHDL VGA color of the transmitter, there are 4 files, namely, direct output, as well as to find color by ROM, RAM and DRAM through the
ddr_sdr
- ddr ram控制器,使用vhdl语言实现-ddr ram controller,designed by vhdl
ram_wb
- 宽字符ram的实现,在quartus平台实现-wide word ram,desinged by vhdl on quartus platform
70T633_VHDL
- idt 双口RAN 70t633 VHDL驱动-idt DUAL RAM 70t633 VHDL driver
rom_decoder_ram
- 三八译码器 VHDL语言 ROM RAM-Thirty-eight decoder
ram_fpgavhdl
- fpga vhdl实现一个标准双端口ram,可以作为单端口或者双端口用 -fpga vhdl achieve a standard dual-port ram, can be used as a single port or dual port with a
alu_simulation
- VHDL alu unit design and simulation with RAM, ROM, clock generator and 2 simple programs to execute.
75_RAM
- RAM储存器 用VHDL编写,15位输入端口,8位输出端口,以及片选信号,使能信号,写信号-RAM using VHDL, with 15bits input ports, 8bits outputs and select signal, enable signal and writing signal.
circuit_vhdl
- this file is vhdl code for ram
Package
- Package consists of two pdf files: i)cdr project: theory and implementation of vhdl ii)I2C bus controller: xilinx implementation of uC interface on CPLD Package consists of 7 vhdl files: string_detector: detects the continuous string of 11
max2work
- vhdl code for ram,you can use it easy
fft
- This a vhdl code written to compute fft for the values stored in a RAM. The fft values are stored in bit reversed order finally in the same RAM. Not sure if it is working 100 . For my test input it worked.-This is a vhdl code written to compute fft f
S_ram
- This is code of static ram in vhdl
dualram
- VHDL Dual Clock Synchronous RAM Design
ram_control_17_xian
- 基于VHDL的ram控制器,8根输入,8根输出,1根读写控制线。实现ram的读写控制-The ram controller based on VHDL, 8 input and 8 output, a read-write control lines. Ram read and write control
RAM1
- 自己实现的ram,使用vhdl语言写的,经常在项目中使用-a ram written by vhdl ,very good
true_dual_port_ram_single_clock
- Quartus II VHDL Template. True Dual-Port RAM with dual clock.
true_dual_port_ram_dual_clock
- Quartus II VHDL Template True Dual-Port RAM with dual clock
vga1
- alart II硬件vhdl语言,vga显示,实现猜数字游戏小游戏,内部使用ram,vga,nodII编程,内程序完整,适合于课堂课题的完成。-hardware VHDL language alart II, VGA display, the game of guessing game, internal RAM, VGA, nodII programming within the integrity of the process, suitable for the completion of