搜索资源列表
EvsStore
- 用VHDL编写的由FPGA控制SDRAM的存储控制程序-VHDL prepared by the FPGA control SDRAM memory control procedures
sdramusevhdl
- sdram的vhdl实现 本文介绍了sdram的控制时序特征,并介绍了采用vhdl语言实现的sdram控制器的关键技术-SDRAM This paper introduces the realization of SDRAM timing control features, and introduces the VHDL language SDRAM controller of the key technologies
mt48lc8m16a2
- sdram的行为级模拟模块,可以模拟一个sdram,用于仿真对sdram的控制.-sdram behavioral simulation module can simulate a sdram. Simulation for the control of sdram.
DDR_SDRAM_use_in_embedded
- 很多嵌入式系统,特别是应用于图像处理与高速数据采集等场合的嵌入式系统,都需要高速缓存大量的数据。DDR(Double Data Rate,双数据速率)SDRAM由于其速度快、容量大,而且价格便宜,因此能够很好地满足上述场合对大量数据缓存的需求。但DDR SDRAM的接口不能直接与现今的微处理器和DSP的存储器接口相连,需要在其间插入控制器实现微处理器或DSP对存储器的控制。-many embedded systems, especially for image processing and hi
control_interface
- SDRAM控制器Verilog员代码,控制接口模块,完成和顶层模块的控制命令的传递-SDRAM controller member Verilog code control interface module, Top module and complete the transfer of control orders
Commandinterface
- SDRAM控制器Verilog员代码,命令生成模块,完成SDRAM控制接口命令的生成-SDRAM controller member Verilog code, order generation module, SDRAM interface complete control orders Generation
TS201上的多通道DMA控制源代码
- TS201上的多通道DMA控制源代码,包含SDRAM读写,TS201 on the multi-channel DMA control of source code, including SDRAM read and write
use~Verilogtocontrol~FPGASDRAM
- 介绍了SDRAM的特点和工作原理,提出了一种基于FPGA的SDRAM控制器的设计方法,使用该方法实现的控制器可非常方便地对SDRAM进行控制。-Describes the characteristics and working principle of SDRAM, we propose a FPGA-based SDRAM controller design method, using the method of the controller can easily control the SD
sdram_latest.tar
- sdram 控制器 verilog 源码-verilog source of sdram control
SDRAM
- FPGA上实现SDRAM初始化及控制源程序-Implemented on FPGA SDRAM initialization and control source
3.2.2-SDRAM
- DTK643 V1.0 EMIF读写例程:同步动态存储器的访问与控制。-Routine DTK643 V1.0 EMIF, speaking, reading and writing: synchronous dynamic memory access and control.
SDRAM
- 通过配置NOIS软核实现对SDRAM的读写控制-By configuring NOIS soft core to achieve the SDRAM read and write control
DDR2Controller
- DDR2 SDRAM Control Verilog RTL Code
SDRAM_Verilog
- 本源码由Verilog语言编写,用硬件实现SDRAM的读写和存储数据功能,包括SDRAM的控制模块、初始化模块、读写模块等!-The source the Verilog language, implemented in hardware SDRAM read and write and store data, including SDRAM control module, initialization module, reader module, etc!
sdram_latest.tar
- SDRAM的控制代码,包含文档说话和testbench测试代码-SDRAM control code, including documents speak and testbench test code
sdram_ctrl1
- 基于VHDL语言,实现了sdram控制器,已经过验证可用-design for sdram control
sdram_top
- 使用FPGA实现SDRAM逻辑控制器,适用于各种型号的FPGA-SDRAM control by verilog
11_sdram_test
- module sdram_test( input clk_50m, input reset_n, //sdram control output S_CLK, //sdram clock output S_CKE, //sdram clock enable output S_NCS, //sdram chip select output S_NWE, //sdram write enable output S_NC
按键控制led
- 按键控制led灯亮灭顺序,从左到右跑或者从右往左跑(Press button to control the LED lights on and off)
ddr_sdram
- 包含ddr_sdr_conf_pkg.vhd,reset.vhd,ddr_dcm.vhd,user_if.vhd,ddr_sdram.vhd,Mt46v16m16.vhd以及仿真TB文件;设计采用Virtex ii系列芯片,DDR_SDRAM型号为Mt46v16m16,可用于进行DDR控制的初步学习使用;通过细致了解并进行逻辑控制,可深入理解DDR芯片内部构造; 支持133MHz系统时钟频率,突发长度为2,可进行读、写、NOP、激活、自刷新配置、预充电以及各ROW/BANK的激活改变等动作,较