搜索资源列表
qjq
- 通过ISE软件采用VHDL语言实现1位全加器的功能-Through the ISE software using VHDL language a full adder function
proj1
- 在Xilinx的ISE下用VHDL实现的3-8线译码器。-In the Xilinx ISE implementation using VHDL 3-8 line decoder.
DoubleRoad
- 用VHDL编写的FPGA程序，运行在ISE中，仿真通过，设计一种CCD的采集方案-The FPGA program written in VHDL, run in the ISE, simulation, design a kind of CCD acquisition scheme
VHDL_design
- 本综合实验包括节拍脉冲发生器、键盘扫描显示和八位二进制计数器三个模块。采用VHDL语言为硬件描述语言，Xilinx ISE 10.1作为开发平台，所开发的程序通过调试运行验证，初步实现了设计目标。-This includes comprehensive experimental beats pulse generator, display and keyboard scan eight binary counter three modules. Using VHDL as the hardwar
clock____!
- The project is designed with the hour hand and the minute and the second time in the ISE software language. Vhdl written.
FIR_poroje
- this project is about FIR FIlter By VHdl codes in the ISE.
Counter
- Counter in VHDL using Xilinx ISE
alu
- 可以实现十六种算术运算和逻辑运算的VHDL代码哦，ISE上编译仿真可以运行-Can achieve sixteen kinds of arithmetic and logic operations of the VHDL code Oh, ISE compiled simulation can be run on
fsm
- 检测连续3个1的状态机的VHDL代码，输入11111则输出00111，ISE可以编译仿真，运行-Detecting consecutive three one state machine VHDL code, enter 11111 Output 00111, ISE can compile simulation run
lablab2
- 实现四位串入串出的移位寄存器，其实就是四个D触发器相连的VHDL代码，ISE可以运行-Achieve four string into the string out of the shift register, in fact, four D flip-flop connected to the VHDL code, ISE can run
Signal3
- ISE设计的三角波发生器VHDL实现及报告-ISE Design of the triangular wave generator VHDL implementation and reporting.
yimaqi_beh
- 8位计数器作业中的behavioral描写，没有带testbench，已经通过-1. Construct VHDL models for 74-139 dual 2-to-4-line decoders using three descr iption types, i.e., behavioral, dataflow and structural descr iptions. Synthesize and simulate these models respectively in the en
CPU_project
- CPU设计与实践实验源码，工程文件 ise。VHDL代码 可直接运行-cpu project
moore
- 状态机 基于xilinx ise硬件描述语言-moore VHDL
counter4
- 计数器 基于xilinx ise硬件描述语言-counter VHDL
1245_COR
- simulink of mobile robot vhdl and ise matlab progra-simulink of mobile robot vhdl and ise matlab programm
ExamTechAss2009
- un controller pi par le langage VHDL xilinx ise design 13.2
TechAss-2006
- un controller pi par le langage VHDL xilinx ise design 13.2
uart
- 基于VHDL和ISE平台编写的UART设计。其中包括了接收，发送，波特产色器，顶层v文件，和相关的测试v文件。代码有注释，仿真成功，可直接利用测试文件测试。还附带uart课程设计报告。-ISE platform written in VHDL and UART design. Including receiving, sending, Porter produced color picker, the top v files, and the associated test v file. Co
I2C
- I2C总线控制器的VHDL代码、ISE工程文件、ModelSim仿真环境等-I2C bus controller VHDL code, ISE project file, ModelSim simulation environment