搜索资源列表
mipsinverilogandvhdl
- mips prcessor in Verilog and vhdl-mips prcessor in vhdl and Verilog
MIPS
- MIPS处理器的顶层VHDL代码，可综合，可仿真，属硬件描述语言，集成电路设计代码
Digital-Design-and-Computer-Architecture-VHDL
- 《数字设计和计算机体系结构》一书MIPS VHDL源码。
MIPS32ALU
- VHDL MIPS 32位ALU的设计，基于Quaryus II平台-VHDL MIPS 32 位 ALU design platform based on Quaryus II
MIPS32Barrelshifter
- VHDL MIPS 32位桶形移位器的设计-VHDL MIPS 32-bit barrel shifter design
MIPScpu
- MIPS处理器VHDL代码，实现加法，减法乘除等运算，可综合-MIpscup vith vhdl
IP_CORES
- IC内核的设计源码！其中包含MP3内核，CPU内核，I2C内核等多达式种IC设计的源码！-IC design of the kernel source code! MP3 contains one of the kernel, CPU core, I2C kernel up-type species such as IC design source!
mips2000src
- A small MIPS R2000 implementation in VHDL
DES
- DES加密算法的VHDL实现,采用流水线技术实现-The VHDL implement of DES encrypt algorithmic
mipssimple
- simple MIPS source code very simple it has not complete but you can test it
mips_multi
- mips processor multicycle non-pipelined microprocessor by verilog
mips2
- fully working mips pipelined with all files
microprocessor
- 一个微处理器的Verilog代码，根据英文书籍《数字设计与架构》中的例子而写，能够运行MIPS指令，能正确执行跳转指令。通过modelsim仿真，含测试代码。-Verilog code for a microprocessor, according to the English book " Digital Design and Architecture" was written in the example, to run MIPS instructions to jump
PipelineCPU
- Quartus II 7.2环境中，采用硬件描述语言VHDL独立完成了基于MIPS指令集的32位RISC处理器的逻辑设计-quartusII mips pipeline 32bit cpu design
singleCycleProc
- 简化的单时钟循环VHDL处理器.可以运行一些简单的mips指令，例如add, sub, and, or, slt, beq and j. -A simplified single cycle processor in VHDL. This processor can continuously execute some simple MIPS instructions which are lw, sw, add, sub, and, or, slt, beq and j.
32registergroup
- VHDL MIPS 32位寄存器组的设计-VHDL MIPS 32-bit register set design
project3
- mips single cycle cpu
MIPS
- 用VHDL设计单周期的MIPS处理器,实现简单的指令-VHDL design with single-cycle MIPS processor, simple instructions
VHDL-for-Datapath
- MIPS CPU with Mulicycle Datapath. This is a custom RISC processor implemented to achieve the function of "lw, sw, add, sub, and, or, beq, j" Mem.vhd - memory buffer.vhd - buffer ALUcon.vhd - Alu controller pc.vhd - program counter REG - reg
mips
- implement of mips data path in single cycle with vhdl language